Are you an EPFL student looking for a semester project?
Work with us on data science and visualisation projects, and deploy your project as an app on top of Graph Search.
Concept
Serial Peripheral Interface
Summary
Serial Peripheral Interface (SPI) is a de facto standard (with many variants) for synchronous serial communication, used primarily in embedded systems for short-distance wired communication between integrated circuits.
SPI uses a main–subnode architecture, where one main device orchestrates communication by providing the clock signal and chip select signal(s) which control any number of subservient peripherals.
Motorola's original specification uses four wires to perform full duplex communication. It is sometimes called a four-wire serial bus to contrast with three-wire variants which are half duplex, and with the two-wire I2C and 1-Wire serial buses.
Typical applications include interfacing microcontrollers with peripheral chips for Secure Digital cards, liquid crystal displays, analog-to-digital and digital-to-analog converters, flash and EEPROM memory, and various communication chips.
SPI may be accurately described as a synchronous serial interface, but it is different from the Synchronous Serial Interface (SSI) protocol.
(Note: Variations section describes operation of non-standard variants.)
SPI has four logic signals (which go by alternative namings):
SCLK : Serial Clock (clock signal from main)
MOSI : Main Out Sub In (data output from main)
MISO : Main In Sub Out (data output from sub)
(active low signal from main to address subs and initiate transmission)
MOSI on a main outputs to MOSI on a sub. MISO on a sub outputs to MISO on a main.
SPI operates with a single device acting as main and with one or more sub devices.
Sub devices should use tri-state outputs so their MISO signal becomes high impedance (electrically disconnected) when the device is not selected. Subs without tri-state outputs cannot share a MISO wire with other subs without using an external tri-state buffer.
To begin communication, the SPI main first selects a sub device by pulling its low. (Note: the bar above indicates it is an active low signal, so a low voltage means "selected", while a high voltage means "not selected")
If a waiting period is required, such as for an analog-to-digital conversion, the main must wait for at least that period of time before issuing clock cycles.
Official source
About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.
Ontological neighbourhood
Related publications (55)