Concept
Design rule checking
Related lectures (33)
Test Environment Setup
Covers the setup of a test environment for VLSI design.
Virtual Machine Access: Setup and Design Environment
Covers the setup and access to virtual machines for IC design practical exercises.
Complex Gates: Exercise-2 Solution
Covers the design of complex logic gates in VLSI.
How we design chips: The Digital VLSI Design Flow
Explores the principles and methodologies for designing integrated circuits, covering design flows, VLSI styles, abstraction levels, and the semiconductor ecosystem.
Logical Effort: Fundamentals of VLSI Design
Covers the Logical Effort method for optimizing logic delay and gate sizing impact.
Semicustom RTL Design: Backend
Explores the backend design flow in semicustom ASIC design, covering layout, clock tree generation, and tapeout preparation.
Concrete Bridges: Stability and Piles
Discusses the design of bearing slabs and the stability of piles in concrete bridges.
Logical Effort: Optimum Sizing and Branch Efforts
Explores logical effort, optimum sizing, and branch efforts in VLSI design.
Introduction to Advanced VLSI Design
Covers Advanced VLSI Design concepts, including Full Custom Design and Parallel Prefix Adder.
Semicustom RTL Design: Design Flow and Standard Cells
Explores the RTL design flow, chip-level integration, standard cells, and static timing analysis in VLSI design.