Publications related to Cache-oblivious algorithm

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

David Atienza Alonso, Marina Zapater Sancho, William Andrew Simon, Yasir Mahmood Qureshi

The rapid expansion of online-based services requires novel energy and performance efficient architectures to meet power and latency constraints. Fast architectural exploration has become a key enabler in the proposal of architectural innovation. In this p ...

IEEE2019

Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations

Anastasia Ailamaki, Georgios Psaropoulos

Non-Volatile Memory (NVM) technologies exhibit 4× the read access latency of conventional DRAM. When the working set does not fit in the processor cache, this latency gap between DRAM and NVM leads to more than 2× runtime increase for queries dominated by ...

ACM2019

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

Anastasia Ailamaki, Georgios Psaropoulos

Index joins present a case of pointer-chasing code that causes data cache misses. In principle, we can hide these cache misses by overlapping them with computation: The lookups involved in an index join are parallel tasks whose execution can be interleaved ...

2018

Adaptive Cache Mode Selection for Queries over Raw Data

Anastasia Ailamaki, Tahir Azim, Azqa Nadeem

Caching the results of intermediate query results for future re-use is a common technique for improving the performance of analytics over raw data sources. An important design choice in this regard is whether to lazily cache only the offsets of satisfying ...

2018

Exploiting Compute Caches for Memory Bound Vector Operations

Paolo Ienne, Gabriel Falcao Paiva Fernandes, João Miguel Morgado Pereira Vieira

To reduce the average memory access time, most current processors make use of a multilevel cache subsystem. However, despite the proven benefits of such cache structures in the resulting throughput, conventional operations such as copy, simple maps and red ...

IEEE2018

ESTIMA: Extrapolating ScalabiliTy of In-Memory Applications

Rachid Guerraoui, Aleksandar Dragojevic, Georgios Chatzopoulos

This article presents ESTIMA, an easy-to-use tool for extrapolating the scalability of in-memory applications. ESTIMA is designed to perform a simple yet important task: Given the performance of an application on a small machine with a handful of cores, ES ...

2017

Information-Theoretic Caching: The Multi-User Case

Michael Christoph Gastpar, Sung Hoon Lim, Chien-Yi Wang

In this paper, we consider a cache aided network in which each user is assumed to have individual caches, while upon users’ requests, an update message is sent through a common link to all users. First, we formulate a general information theoretic setting ...

Institute of Electrical and Electronics Engineers2017

Efficient preconditioning of hp-FEM matrices arising from time-varying problems: an application to topology optimization

Jan Sickmann Hesthaven, Paolo Gatto

We previously introduced a preconditioner that has proven effective for hp-FEM dis- cretizations of various challenging elliptic and hyperbolic problems. The construc- tion is inspired by standard nested dissection, and relies on the assumption that the Sc ...

Elsevier2017

K Users Caching Two Files: An Improved Achievable Rate

Michael Christoph Gastpar, Saeid Sahraei

Caching is an approach to smoothen the variability of traffic over time. Recently it has been proved that the local memories at the users can be exploited for reducing the peak traffic in a much more efficient way than previously believed. In this work we ...

Ieee2016

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Cache-oblivious algorithm

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

Adaptive Cache Mode Selection for Queries over Raw Data

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs

Exploiting Compute Caches for Memory Bound Vector Operations

ESTIMA: Extrapolating ScalabiliTy of In-Memory Applications

Information-Theoretic Caching: The Multi-User Case

Efficient preconditioning of hp-FEM matrices arising from time-varying problems: an application to topology optimization

K Users Caching Two Files: An Improved Achievable Rate

Graph Chatbot

Chat with Graph Search

K Users Caching Two Files: An Improved Achievable Rate

Exploiting Compute Caches for Memory Bound Vector Operations

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs

Information-Theoretic Caching: The Multi-User Case

Efficient preconditioning of hp-FEM matrices arising from time-varying problems: an application to topology optimization

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations

Adaptive Cache Mode Selection for Queries over Raw Data

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

ESTIMA: Extrapolating ScalabiliTy of In-Memory Applications