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Athlon 64 X2

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Athlon 64 X2

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System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

High Speed SAR ADC Architectures in 28nm FDSOI CMOS

Sub-electron CIS noise analysis in 65 nm process

STREX: Boosting Instruction Cache Reuse in OLTP Workloads Through Stratified Transaction Execution

Cuckoo Directory: A Scalable Directory for Many-Core Systems

Performance and Energy Trade-offs Analysis of L2 on-Chip Cache Architectures for Embedded MPSoCs

MPSoC Design using Application-Specific Architecturally Visible Communication

New approach for SOI pixel sensor