Concept
IBM System/360
Related publications (19)
Beam test performance of a prototype module with Short Strip ASICs for the CMS HL-LHC tracker upgrade
Qian Wang, Varun Sharma, Konstantin Androsov, Xin Chen, Davide Di Croce, Rakesh Chawla, Tian Cheng, Werner Lustermann, Andromachi Tsirou, Andrea Rizzi, Jessica Prisciandaro, David Vannerom, Albert Perez, Alessandro Caratelli, François Robert, Davide Ceresa, Chun Xia, Yong Yang, Ajay Kumar, Ashish Sharma, Georgios Anagnostou, Muhammad Ahmad, Francesco Fiori, Kai Yi, Jing Li, Hui Wang, Stefano Michelis, François Bianchi, David Parker
The Short Strip ASIC (SSA) is one of the four front-end chips designed for the upgrade of the CMS Outer Tracker for the High Luminosity LHC. Together with the Macro-Pixel ASIC (MPA) it will instrument modules containing a strip and a macro-pixel sensor sta ...
2022Architecture Exploration and Optimization of Heterogeneous Many-Core Compute and Memory Architectures with Architectural Extensions
The expeditious proliferation of Internet connectivity and the growing adoption of digital products have transformed various spheres of our everyday lives. This increased digitization of society has led to the emergence of new applications, which are deplo ...
EPFL2021Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications
Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Pascal Andreas Meinerzhagen
Logic compatible gain cell (GC) embedded DRAM (eDRAM) arrays are considered an alternative to SRAM due to their small size, non-ratioed operation, low static leakage, and 2-port functionality. However, traditional GC-eDRAM implementations require boosted c ...
Ieee-Inst Electrical Electronics Engineers Inc2016Confluence: unified instruction supply for scale-out servers
Babak Falsafi, Boris Robert Grot, Ilknur Cansu Kaynak
Multi-megabyte instruction working sets of server workloads defy the capacities of latency-critical instruction-supply components of a core; the instruction cache (L1-I) and the branch target buffer (BTB). Recent work has proposed dedicated prefetching tec ...
ACM Press2015Energy-Efficient Co-Design Optimization of Many-Core Platforms for Big-Data Streaming Applications
Big-Data streaming applications are used in several domains such as social media analysis, financial analysis, video annotation, surveillance, medical services and traffic prediction. These applications, running on different types of platforms from mobile ...
EPFL2015Single event upset mitigation in low power SRAM design
Logic compatible gain cell (GC)-embedded DRAM (eDRAM) arrays are considered an alternative to SRAM due to their small size, nonratioed operation, low static leakage, and two-port functionality. However, traditional GC-eDRAM implementations require boosted ...
IEEE2014Code-Pointer Integrity
George Candea, Mathias Josef Payer, Volodymyr Kuznetsov
Systems code is often written in low-level languages like C/C++, which offer many benefits but also delegate memory management to programmers. This invites memory safety bugs that attackers can exploit to divert control flow and compromise the system. Depl ...
2014Integration of solid-state dye-sensitized solar cell with metal oxide charge storage material into photoelectrochemical capacitor
Nikolaos Vlachopoulos, Ulf Anders Hagfeldt, Lin Yang
A solid-state photo-rechargeable capacitor (photocapacitor) is obtained here by coupling a dye-sensitized solar cell and a ruthenium oxide based electrochem. capacitor. This integrated system permits direct storage of energy generated by sunlight within a ...
2013Exploiting the ALICE HLT for PROOF by scheduling of Virtual Machines
The HLT (High-Level Trigger) group of the ALICE experiment at the LHC has prepared a virtual Parallel ROOT Facility (PROOF) enabled cluster (HAF - HLT Analysis Facility) for fast physics analysis, detector calibration and reconstruction of data samples. Th ...
Iop Publishing Ltd, Dirac House, Temple Back, Bristol Bs1 6Be, England2011High-Speed Power System Stability Simulation Using Analog Computation
Maher Kayal, Laurent Fabre, Ira Nagel
This paper presents a microelectronic emulation approach for high-speed power system computation. First, the problems of existing power system simulators are detailed. This shows that microelectronic emulation is a possible solution for solving the speed p ...
2010