Concept

Asymmetric multiprocessing

Related publications (32)

Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices

Jean-Michel Sallese, Farzan Jazaeri, Lucian Barbut

This paper aims to model asymmetric operation in double gate junctionless FETs. Following a rigorous approach, we find that asymmetric operation can be simulated by combining two symmetric junctionless FETs, what we call the virtual symmetric device concep ...

Institute of Electrical and Electronics Engineers2014

Porting an MPEG-HEVC decoder to a low-power many-core platform

Marco Mattavelli, Simone Casale Brunet, Claudio Paolo Alberti, Damien Jack De Saint Jorre

After several generations of video coding standards, MPEG High Efficient Video Coding (HEVC) is likely to emerge as the video coding standards for HD and Ultra-HD TV. HEVC decoding is expected to be less computationally demanding and to provide a higher le ...

2013

CCNoC: On-Chip Interconnects for Cache-Coherent Manycore Server Chips

Giovanni De Micheli, Babak Falsafi, Ciprian Seiculescu, Stavros Volos, Naser Khosro Pour

Manycore chips are emerging as the architecture of choice to provide power-scalability and improve performance while riding the Moore’s law. On-chip interconnects are increasingly playing a pivotal role in power- and performance- scalability of such microa ...

2011

Partitioned real-time scheduling on heterogeneous shared-memory multiprocessors

Martin Niemeier

We consider several real-time scheduling problems on heterogeneous multiprocessor platforms, in which the different processors share a common memory pool. These include (i)~scheduling a collection of implicit-deadline sporadic tasks with the objective of m ...

2011

Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures

Giovanni De Micheli, David Atienza Alonso, Luca Benini

As feature sizes decrease, power dissipation and heat generation density exponentially increase. Thus, temperature gradients in Multiprocessor Systems on Chip (MPSoCs) can seriously impact system performance and reliability. Thermal balancing policies base ...

2008

On-chip implementation of multiprocessor networks and switch fabrics

Giovanni De Micheli

On-chip implementation of multiprocessor systems needs to planarise the interconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor Systems on Chips (MPSoC) node processors are homogeneous, and MPSoC n ...

2008

Mechanisms for store-wait-free multiprocessors

Anastasia Ailamaki, Babak Falsafi

Store misses cause significant delays in shared-memory multiprocessors because of limited store buffering and ordering constraints required for proper synchronization. Today, programmers must choose from a spectrum of memory consistency models that reduce ...

2007

Corezilla: Build and Tame the Multicore Beast?

James Richard Larus

Are multi-core SoCs being held back by the lack of adequate system design and software development tools? Multi-cores supply the advantages of flexible software-defined architectures, but support for system optimization, integration and verification is lac ...

IEEE2007

The Granularity of Soft-Error Containment in Shared-Memory Multiprocessors

Babak Falsafi

Concerns over rising soft-error rates in processor logic has led to numerous proposals for error tolerance mechanisms. In this paper, we examine the role of soft-error containment in a shared memory multiprocessor. We study a range of design alternatives b ...

2006

Spatial Memory Streaming

Anastasia Ailamaki, Babak Falsafi

Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and as such cannot exploit the variation. Increasing the block size would not only proh ...

2006

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