Concept

Multi-core processor

Related publications (748)

Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache

The advent of 3-D fabrication technology makes it possible to stack a large amount of last-level cache memory onto a multi-core die to reduce off-chip memory accesses and, thus, increases system performance. However, the higher power density (i.e., power d ...

2014

openBEB: open biological experiment browser for correlative measurements

Henning Paul-Julius Stahlberg, Sophie Roizard

Background: New experimental methods must be developed to study interaction networks in systems biology. To reduce biological noise, individual subjects, such as single cells, should be analyzed using high throughput approaches. The measurement of several ...

Biomed Central Ltd2014

A Parallel QZ Algorithm For Distributed Memory HPC Systems

Daniel Kressner

Appearing frequently in applications, generalized eigenvalue problems represent one of the core problems in numerical linear algebra. The QZ algorithm of Moler and Stewart is the most widely used algorithm for addressing such problems. Despite its importan ...

Siam Publications2014

GentleRain: Cheap and Scalable Causal Consistency with Physical Clocks

Willy Zwaenepoel, Calin Iorgulescu, Jiaqing Du, Amitabha Roy

GentleRain is a new causally consistent geo-replicated data store that provides throughput comparable to eventual consistency and superior to current implementations of causal consistency. GentleRain uses a periodic aggregation protocol to deter- mine whet ...

ACM2014

Eliminating unscalable communication in transaction processing

Anastasia Ailamaki, Frederick Ryan Johnson, Ippokratis Pandis

Multicore hardware demands software parallelism. Transaction processing workloads typically exhibit high concurrency, and, thus, provide ample opportunities for parallel execution. Unfortunately, because of the characteristics of the application, transacti ...

Springer Verlag2014

Online Energy-Efficient Task-Graph Scheduling for Multicore Platforms

David Atienza Alonso, Karim Kanoun

Numerous Directed-Acyclic Graph (DAG) schedulers have been developed to improve the energy efficiency of various multi-core platforms. However, these schedulers make a priori assumptions about the relationship between the task dependencies, and they are un ...

Institute of Electrical and Electronics Engineers2014

ADDICT: Advanced Instruction Chasing for Transactions

Anastasia Ailamaki, Pinar Tözün

Recent studies highlight that traditional transaction processing systems utilize the micro-architectural features of modern processors very poorly. L1 instruction cache and long-latency data misses dominate execution time. As a result, more than half of th ...

2014

Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache

Babak Falsafi, Ilknur Cansu Kaynak

Recent research advocates large die-stacked DRAM caches in manycore servers to break the memory latency and bandwidth wall. To realize their full potential, die-stacked DRAM caches necessitate low lookup latencies, high hit rates and the efficient use of o ...

IEEE2014

IX: A Protected Dataplane Operating System for High Throughput and Low Latency

Edouard Bugnion, Christos Kozyrakis, Georgios Prekas, Ana Klimovic

The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and microsecond-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. We present IX, a dataplane operati ...

USENIX2014

Alignment of the CMS tracker with LHC and cosmic ray data

Jian Wang, Matthias Finger, Lesya Shchutska, Qian Wang, Matthias Wolf, Varun Sharma, Konstantin Androsov, Jan Steggemann, Roberto Castello, Alessandro Degano, Mingkui Wang, João Miguel das Neves Duarte, Lei Zhang, Tian Cheng, Yixing Chen, Werner Lustermann, Andromachi Tsirou, Alexis Kalogeropoulos, Andrea Rizzi, Ioannis Papadopoulos, Paolo Ronchese, Thomas Muller, Giuseppe Codispoti, Paul Turner, Wei Sun, Raffaele Tito D'Agnolo, Jie Chen, Davide Ceresa, Ji Hyun Kim, Donghyun Kim, Dipanwita Dutta, Zheng Wang, Sanjeev Kumar, Wei Li, Yong Yang, Ajay Kumar, Ashish Sharma, Georgios Anagnostou, Joao Varela, Csaba Hajdu, Muhammad Ahmad, Ekaterina Kuznetsova, Ioannis Evangelou, Matthias Weber, Muhammad Shoaib, Vineet Kumar, Vladimir Petrov, Francesco Fiori, Quentin Python, Meng Xiao, Hao Liu, Sourav Sen, Marco Trovato, Gurpreet Singh, Xiao Wang, Kai Yi, Rajat Gupta, Shuai Liu, Aram Avetisyan, Yu Zheng, Charles Dietz, Michal Simon, Matteo Marone, Giovanni Bianchi, Wenjing Wu, Yifei Guo, Yu Fu, Stefano Michelis, Federico Faccio, Stéphane Détraz

The central component of the CMS detector is the largest silicon tracker ever built. The precise alignment of this complex device is a formidable challenge, and only achievable with a significant extension of the technologies routinely used for tracking de ...

2014

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