Related publications (52)

FPGA-SPICE: A Simulation-based Power Estimation Framework for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

Mainstream Field Programmable Gate Array (FPGA) power estimation tools are based on probabilistic activity estimation and analytical power models. The power consumption of the programmable resources of FPGAs is highly sensitive to their configurations. Due ...
2015

Parametric scripting for early design performance simulation

Guillaume Labelle

This paper discusses the advantages of using a coding interface both to describe form and run performance simulations in the context of architectural design. It outlines the relevance of combining recent interest in the design community for parametric scri ...
Elsevier Science Sa2014

Nanowire systems: technology and design (invited paper)

Giovanni De Micheli, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Shashi Kanth Bobba, Michele De Marchi

Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this work, we consider double independent gate, vertically-stacked nanowire FETs with gate-all-around structures and typical diameter of 20-nm. These devices, which we hav ...
Royal Soc2014

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Giovanni De Micheli, Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato

3D-ICs based on TSV technology provide high bandwidth inter-chip connections. The drawback is that most of the existing TSVs consume a large amount of silicon real estate. We present circuit-level design and analysis of area efficient, low power, high-data ...
2014

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Giovanni De Micheli, Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato

3D-ICs based on TSV technology provide high bandwidth inter-chip connections. The drawback is that most of the existing TSVs consume a large amount of silicon real estate. We present circuit-level design and analysis of area efficient, low power, high-data ...
2014

Limits to high-speed simulations of spiking neural networks using general-purpose computers

Wulfram Gerstner, Friedemann Zenke

To understand how the central nervous system performs computations using recurrent neuronal circuitry, simulations have become an indispensable tool for theoretical neuroscience. To study neuronal circuits and their ability to self-organize, increasing att ...
Frontiers Research Foundation2014

A simulation-optimization approach to deploy Internet services in large-scale systems with user-provided resources

Cloud computing systems can benefit from the use of personal and non-dedicated computers, which are currently employed in volunteer computing systems. Being non-dedicated, these resources show random behavior regarding the times they are online (available) ...
Sage Publications Ltd2014

OCTOPUS: Efficient Query Execution on Dynamic Mesh Datasets

Anastasia Ailamaki, Henry Markram, Felix Schürmann, Thomas Heinis, Farhan Tauheed

Scientists in many disciplines use spatial mesh models to study physical phenomena. Simulating natural phenomena by changing meshes over time helps to understand and predict future behavior of the phenomena. The higher the precision of the mesh models, the ...
2014

Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance

Mihai Adrian Ionescu, Didier Bouvet, Luca De Michielis, Cem Alper, Livio Lattanzio, Nilay Dagtekin

We report the significant improvement obtained by a non-uniform gate capacitance made by appropriate combination of high-k and low-k regions over the tunneling and the channel regions of a heterostucture TFET (called HKLKFFET). In addition to significantly ...
Elsevier2013

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Silicon NanoWire (SiNW) based Field Effect Tran- sistors (FETs) are promising candidates to extend Moore’s law in the coming years. Recently, Double-Gate (DG) SiNWFETs have been demonstrated to allow on-line configurability of n -type and p -type device po ...
2013

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