Sense amplifier | EPFL Graph Search

In modern computer memory, a sense amplifier is one of the elements which make up the circuitry on a semiconductor memory chip (integrated circuit); the term itself dates back to the era of magnetic core memory. A sense amplifier is part of the read circuitry that is used when data is read from the memory; its role is to sense the low power signals from a bitline that represents a data bit (1 or 0) stored in a memory cell, and amplify the small voltage swing to recognizable logic levels so the data can be interpreted properly by logic outside the memory. Modern sense-amplifier circuits consist of two to six (usually four) transistors, while early sense amplifiers for core memory sometimes contained as many as 13 transistors. There is one sense amplifier for each column of memory cells, so there are usually hundreds or thousands of identical sense amplifiers on a modern memory chip. As such, sense amplifiers are one of the few remaining analog circuits in a computer's memory subsyst

Reference current generator, and method of programming, adjusting and/or operating same

Marija Blagojevic, Michel Declercq, Maher Kayal, Marc Pastre, Lionel Portmann

There are many inventions described and illustrated herein. In a first aspect, the present invention is a technique and circuitry for reading data that is stored in memory cells. In one embodiment of this aspect, the present invention is a technique and circuitry for generating a reference current that is used, in conjunction with a sense amplifier, to read data that is stored in memory cells of a DRAM device. The technique and circuitry for generating a reference current may be implemented using an analog configuration, a digital configuration, and/or combinations of analog and digital configurations.

2005

Methodology for the digital calibration of analog circuits and systems

Marc Pastre

This thesis presents a complete methodology for the digital calibration of analog circuits. It shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. In addition, three applications of the methodology are proposed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. An additional up/down converter is suggested for the compensation of continuoustime analog signal processing circuits. The first application shows how the sub-binary M/2+M structure can be employed as a conventional digital-to-analog converter if two calibration and radix conversion algorithms are implemented. The second application, a SOI 1T DRAM, is then presented. An automatic reference current generation for memory reading is described. A digital algorithm chooses a suitable value which compensates several circuit imperfections together, from the sense amplifier offset to the dispersion of the memory read currents. The third application is the calibration of the sensitivity of a current measurement microsystem based on a Hall magnetic field sensor. An integrated reference generates a magnetic field for calibration. Using a variant of the chopper modulation, the spinning current technique, combined with a second modulation of the reference signal, the sensitivity of the complete system is continuously measured without interrupting normal operation. Modulation and demodulation schemes allowing the joint processing of both external and reference magnetic fields are proposed. Additional circuit techniques for extracting the very low reference signal are presented. The implementation of the microsystem is then discussed. The realization of the blocks composing the system is detailed, and circuit issues are presented. Finally, measurements validate the calibration principle. A thermal drift lower than 50 ppm/°C is achieved. This is 6 to 10 times less than in state-ofthe-art implementations. Furthermore, the calibration technique also compensates drifts due to mechanical stresses and ageing.

EPFL2005

Comparison of two optimized readout chains for low light CIS

Assim Boukhayma, Christian Enz

We compare the noise performance of two optimized readout chains that are based on 4T pixels and featuring the same bandwidth of 265kHz (enough to read 1Megapixel with 50frame/s). Both chains contain a 4T pixel, a column amplifier and a single slope analog-to-digital converter operating a CDS. In one case, the pixel operates in source follower configuration, and in common source configuration in the other case. Based on analytical noise calculation of both readout chains, an optimization methodology is presented. Analytical results are confirmed by transient simulations using 130nm process. A total input referred noise bellow 0.4 electrons RMS is reached for a simulated conversion gain of 160μV/e−. Both optimized readout chains show the same input referred 1/f noise. The common source based readout chain shows better performance for thermal noise and requires smaller silicon area. We discuss the possible drawbacks of the common source configuration and provide the reader with a comparative table between the two readout chains. The table contains several variants (column amplifier gain, in-pixel transistor sizes and type). © (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

2014

Methodology for the digital calibration of analog circuits and systems

Marc Pastre

EPFL2005