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Network on a chip

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Network on a chip

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Tackling the Bottleneck of Delay Tables in 3D Ultrasound Imaging

An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory

An all-silicon single-photon source by unconventional photon blockade

Signaling in 3-D integrated circuits, benefits and challenges

Development of wireless sensor network using bluetooth low energy (BLE) for construction noise monitoring

Low Power FPGAs Based on Resistive Memories

Highly Scalable Digital Silicon Photonic MEMS Switches

Tackling the Bottleneck of Delay Tables in 3D Ultrasound Imaging

Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory

Signaling in 3-D integrated circuits, benefits and challenges

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology

Development of wireless sensor network using bluetooth low energy (BLE) for construction noise monitoring

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

An all-silicon single-photon source by unconventional photon blockade

Low Power FPGAs Based on Resistive Memories

Highly Scalable Digital Silicon Photonic MEMS Switches