USB flash drive | EPFL Graph Search

A USB flash drive (also called a thumb drive in the US, or a memory stick in the UK & Pen Drive in many countries) is a data storage device that includes flash memory with an integrated USB interface. It is typically removable, rewritable and much smaller than an optical disc. Most weigh less than . Since first appearing on the market in late 2000, as with virtually all other computer memory devices, storage capacities have risen while prices have dropped. , flash drives with anywhere from 8 to 256 gigabytes (GB) were frequently sold, while 512 GB and 1 terabyte (TB) units were less frequent. As of 2018, 2 TB flash drives were the largest available in terms of storage capacity. Some allow up to 100,000 write/erase cycles, depending on the exact type of memory chip used, and are thought to physically last between 10 and 100 years under normal circumstances (shelf storage time). Common uses of USB flash drives are for storage, supplementary back-ups, and transferring o

Coupling-dependent convergence behavior of phase oscillators with tegotae-control

Jonathan Patrick Arreguit O'Neill, Matthieu Guillaume Marie Dujany, Simon Lukas Hauser, Auke Ijspeert

A bio-inspired way to model locomotion is using a network of coupled phase oscillators to create a Central Pattern Generator (CPG). The recently developed feedback control method tegotae includes exteroceptive force feedback into the governing phase update equations, leading to gait limit cycles. However, the oscillator coupling weights are often determined empirically. Here, we first investigate how the coupling coefficients influence the limit cycle convergence behavior on a 2- and 3-limbed structure in simulation. We find that the convergence with tegotae can be improved by introducing appropriate cross-couplings. This results in a smoother convergence and steady-state behavior where each individual oscillator drives the full network to a common convergence state in comparison to competing convergence states with ill-chosen cross-couplings. We then validate the findings in hardware and hypothesize how the appropriate couplings could be derived directly from the morphology, potentially eliminating the empiric determination.

IEEE2021

A (Nearly) Free Lunch

Xavier Jimenez

NAND flash is a key storage technology in modern computing systems. Without it, many devices would probably not exist today or would at least not benefit from as many features. The very large success of this technology motivated massive efforts to scale it down in order to increase its density further. However, NAND flash is currently facing physical limitations that prevent it reaching smaller cell sizes without severely reducing its storage reliability and lifetime. Accordingly, in the present thesis we aim at relieving some constraints from device manufacturing by addressing flash irregularities at a higher level. For example, we acknowledge the fact that process variation plus other factors render some regions of a flash device more sensitive than others. This difference usually leads to sensitive regions exhausting their lifetime early, which then causes the device to become unusable, while the rest of the device is still healthy, yet not exploitable. Consequently, we propose to postpone this exhaustion point with new strategies that require minimal resources to be implemented and effectively extend flash devices lifetime. Sometimes, our strategies involve unconventional methods to access the flash that are not supported by specification document and, therefore, should not be used lightly. Hence, we also present thorough characterization experiments on actual NAND flash chips to validate these methods and model their effect on a flash device. Finally, we evaluate the performance of our methods by implementing a trace-driven flash device simulator and execute a large set of realistic disk traces. Overall, we exploit properties that are either neglected or not understood to propose methods that are nearly free to implement and systematically extend NAND flash lifetime. We are convinced that future NAND flash architectures will regularly bring radical physical changes, which will inevitably come together with a new set of physical properties to investigate and to exploit.

EPFL2014

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

Peng Gao, Hobeom Kim, Mohammad Khaja Nazeeruddin

Here we use triple-cation metal-organic halide perovskite single crystals for the transistor channel of a flash memory device. Moreover, we design and demonstrate a 10 nm thick single-layer nanofloating gate. It consists of a ternary blend of two organic semiconductors, a p-type polyfluorene and an n-type fullerene that form a donor:acceptor interpenetrating network that serves as the charge storage unit, and of an insulating polystyrene that acts as the tunneling dielectric. Under such a framework, we realize the first non-volatile flash memory transistor based on a perovskite channel. This simplified, solution-processed perovskite flash memory displays unique performance metrics such as a large memory window of 30 V, an on/off ratio of 9 x 10(7), short write/erase times of 50 ms, and a satisfactory retention time exceeding 10(6) s. The realization of the first flash memory transistor using a single-crystal perovskite channel could be a valuable direction for perovskite electronics research.

2020

A (Nearly) Free Lunch

Xavier Jimenez

EPFL2014