Clé USB

Résumé

Une clé USB est un support de stockage amovible, inventé dans les années 2000 et prévu pour pouvoir se brancher sur un port USB d'un ordinateur mais qui est, depuis plusieurs années, largement utilisé sur d'autres appareils (chaînes Hi-Fi, lecteurs de DVD de salon, autoradios, radiocassettes, téléviseurs). Une clé USB contient une mémoire flash et ne possède pas ou très peu d'éléments mécaniques, ce qui la rend très résistante aux chocs. Elle permet de copier facilement des fichiers d'un appareil, ayant des capacités d'écriture, à un autre (ce qui facilite le piratage si un ordinateur est mal, ou pas, protégé). Origine Un brevet américain pour une clé USB fut demandé en et attribué le à l'entreprise israélienne M-Systems. Plus tard en 1999, IBM déposa une invention disclosure par un de ses salariés. Clé USB vs microdrive Pour les produits similaires mais contenant un minuscule disque dur à la place de la mémoire flash, on n'utilise pas le terme clé USB mai

Source officielle

https://fr.wikipedia.org/wiki/Cl%C3%A9_USB

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Coupling-dependent convergence behavior of phase oscillators with tegotae-control

Jonathan Patrick Arreguit O'Neill, Matthieu Guillaume Marie Dujany, Simon Lukas Hauser, Auke Ijspeert

A bio-inspired way to model locomotion is using a network of coupled phase oscillators to create a Central Pattern Generator (CPG). The recently developed feedback control method tegotae includes exteroceptive force feedback into the governing phase update equations, leading to gait limit cycles. However, the oscillator coupling weights are often determined empirically. Here, we first investigate how the coupling coefficients influence the limit cycle convergence behavior on a 2- and 3-limbed structure in simulation. We find that the convergence with tegotae can be improved by introducing appropriate cross-couplings. This results in a smoother convergence and steady-state behavior where each individual oscillator drives the full network to a common convergence state in comparison to competing convergence states with ill-chosen cross-couplings. We then validate the findings in hardware and hypothesize how the appropriate couplings could be derived directly from the morphology, potentially eliminating the empiric determination.

IEEE2021

Chargement

NAND flash is a key storage technology in modern computing systems. Without it, many devices would probably not exist today or would at least not benefit from as many features. The very large success of this technology motivated massive efforts to scale it down in order to increase its density further. However, NAND flash is currently facing physical limitations that prevent it reaching smaller cell sizes without severely reducing its storage reliability and lifetime. Accordingly, in the present thesis we aim at relieving some constraints from device manufacturing by addressing flash irregularities at a higher level. For example, we acknowledge the fact that process variation plus other factors render some regions of a flash device more sensitive than others. This difference usually leads to sensitive regions exhausting their lifetime early, which then causes the device to become unusable, while the rest of the device is still healthy, yet not exploitable. Consequently, we propose to postpone this exhaustion point with new strategies that require minimal resources to be implemented and effectively extend flash devices lifetime. Sometimes, our strategies involve unconventional methods to access the flash that are not supported by specification document and, therefore, should not be used lightly. Hence, we also present thorough characterization experiments on actual NAND flash chips to validate these methods and model their effect on a flash device. Finally, we evaluate the performance of our methods by implementing a trace-driven flash device simulator and execute a large set of realistic disk traces. Overall, we exploit properties that are either neglected or not understood to propose methods that are nearly free to implement and systematically extend NAND flash lifetime. We are convinced that future NAND flash architectures will regularly bring radical physical changes, which will inevitably come together with a new set of physical properties to investigate and to exploit.

EPFL2014

Chargement

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

Peng Gao, Hobeom Kim, Mohammad Khaja Nazeeruddin

Here we use triple-cation metal-organic halide perovskite single crystals for the transistor channel of a flash memory device. Moreover, we design and demonstrate a 10 nm thick single-layer nanofloating gate. It consists of a ternary blend of two organic semiconductors, a p-type polyfluorene and an n-type fullerene that form a donor:acceptor interpenetrating network that serves as the charge storage unit, and of an insulating polystyrene that acts as the tunneling dielectric. Under such a framework, we realize the first non-volatile flash memory transistor based on a perovskite channel. This simplified, solution-processed perovskite flash memory displays unique performance metrics such as a large memory window of 30 V, an on/off ratio of 9 x 10(7), short write/erase times of 50 ms, and a satisfactory retention time exceeding 10(6) s. The realization of the first flash memory transistor using a single-crystal perovskite channel could be a valuable direction for perovskite electronics research.

2020

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EPFL2014