In computing, Physical Address Extension (PAE), sometimes referred to as Page Address Extension,
is a memory management feature for the x86 architecture. PAE was first introduced by Intel in the Pentium Pro, and later by AMD in the Athlon processor. It defines a page table hierarchy of three levels (instead of two), with table entries of 64 bits each instead of 32, allowing these CPUs to directly access a physical address space larger than 4 gigabytes (232 bytes).
The page table structure used by x86-64 CPUs when operating in long mode further extends the page table hierarchy to four or more levels, extending the virtual address space, and uses additional physical address bits at all levels of the page table, extending the physical address space. It also uses the topmost bit of the 64-bit page table entry as a no-execute or "NX" bit, indicating that code cannot be executed from the associated page. The NX feature is also available in protected mode when these CPUs are running a 32-bit operating system, provided that the operating system enables PAE.
PAE was first implemented in the Intel Pentium Pro in 1995, although the accompanying chipsets usually lacked support for the required extra address bits.
PAE is supported by the Pentium Pro, Pentium II, Pentium III, and Pentium 4 processors. The first Pentium M family processors ("Banias") introduced in 2003 also support PAE; however, they do not show the PAE support flag in their CPUID information. This was remedied in a later revision of the "Dothan" core in 2005. It was also available on AMD processors including the AMD Athlon (although the chipsets are limited to 32-bit addressing) and later AMD processor models.
When AMD defined their 64-bit extension of the industry standard x86 architecture, AMD64 or x86-64, they also enhanced the paging system in "long mode" based on PAE.
It supports 64-bit virtual addresses ( 48 bits are implemented on some processors and 57 bits are implemented on others), 52-bit physical addresses,
and includes NX bit functionality.
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