Transceiver

Summary

In radio communication, a transceiver is an electronic device which is a combination of a radio transmitter and a receiver, hence the name. It can both transmit and receive radio waves using an antenna, for communication purposes. These two related functions are often combined in a single device to reduce manufacturing costs. The term is also used for other devices which can both transmit and receive through a communications channel, such as optical transceivers which transmit and receive light in optical fiber systems, and bus transceivers which transmit and receive digital data in computer data buses. Radio transceivers are widely used in wireless devices. One large use is in two-way radios, which are audio transceivers used for bidirectional person-to-person voice communication. Examples are cell phones, which transmit and receive the two sides of a phone conversation using radio waves to a cell tower, cordless phones in which both the phone handset and the base station have

Official source

https://en.wikipedia.org/wiki/Transceiver

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Ultra Low Power Communication Protocols for UWB Impulse Radio Wireless Sensor Networks

Jérôme Rousselot

This thesis evaluates the potential of Ultra Wideband Impulse Radio for wireless sensor network applications. Wireless sensor networks are collections of small electronic devices composed of one or more sensors to acquire information on their environment, an energy source (typically a battery), a microcontroller to control the measurements, process the information and communicate with its peers, and a radio transceiver to enable these communications. They are used to regularly collect information within their deployment area, often for very long periods of time (up to several years). The large number of devices often considered, as well as the long deployment durations, makes any manual intervention complex and costly. Therefore, these networks must self-configure, and automatically adapt to changes in their electromagnetic environment (channel variations, interferers) and network topology modifications: some nodes may run out of energy, or suffer from a hardware failure. Ultra Wideband Impulse Radio is a novel wireless technology that, thanks to its extremely large bandwidth, is more robust to frequency dependent propagation effects. Its impulsional nature makes it robust to multipath fading, as the short duration of the pulses leads most multipath components to arrive isolated. This technology should also enable high precision ranging through time of flight measurements, and operate at ultra low power levels. The main challenge is to design a system that reaches the same or higher degree of energy savings as existing narrowband systems considering all the protocol layers. As these radios are not yet widely available, the first part of this thesis presents Maximum Pulse Amplitude Estimation, a novel approach to symbol-level modeling of UWB-IR systems that enabled us to implement the first network simulator of devices compatible with the UWB physical layer of the IEEE 802.15.4A standard for wireless sensor networks. In the second part of this thesis, WideMac, a novel ultra low power MAC protocol specifically designed for UWB-IR devices is presented. It uses asynchronous duty cycling of the radio transceiver to minimize the power consumption, combined with periodic beacon emissions so that devices can learn each other's wake-up patterns and exchange packets. After an analytical study of the protocol, the network simulation tool presented in the first part of the thesis is used to evaluate the performance of WideMac in a medical body area network application. It is compared to two narrowband and an FM-UWB solutions. The protocol stack parameters are optimized for each solution, and it is observed that WideMac combined to UWB-IR is a credible technology for such applications. Similar simulations, considering this time a static multi-hop network are performed. It is found that WideMac and UWB-IR perform as well as a mature and highly optimized narrowband solution (based on the WiseMAC ULP MAC protocol), despite the lack of clear channel assessment functionality on the UWB radio. The last part of this thesis studies analytically a dual mode MAC protocol named WideMac-High Availability. It combines the Ultra Low PowerWideMac with the higher performance Aloha protocol, so that ultra low power consumption and hence long deployment times can be combined with high performance low latency communications when required by the application. The potential of this scheme is quantified, and it is proposed to adapt it to narrowband radio transceivers by combining WiseMAC and CSMA under the name WiseMAC-HA.

EPFL2010

A low-power 2.4 GHz CMOS receiver using BAW resonators

Jérémie Chabloz

It has already been a few years since the first appearance of micro-electromechanical systems (MEMS) in academic research. Since then, a broad number of devices have been designed under this generic term. Bulk-acoustic wave (BAW) resonators are among the few of them which have become exploited at industrial level. They are mainly used to implement filters for mainstream telecommunication applications. In a different domain, potential applications for integrated wireless transceivers are flourishing. While some of them require always higher data rates, others need devices with low data rate but even lower power consumption. The goal of this thesis is to explore ways of using BAW resonators to implement building blocks for such a low-power radio and actually verify the postulate that this could help improving power consumption as well as miniaturize key functionalities. For the active integrated circuit part, the choice of a standard digital 0.18µm CMOS process established itself for its low cost and ubiquity. The specifications for the developed radio receiver are calculated for a physical layer derived from the well known Bluetooth communication protocol in the 2.4GHz ISM band with similar applications scenarii but with much lower data rates and wider channel spacing. After presenting the advantages and limitations of the devices, the implications for using BAWresonators to implement a low-power radio are investigated at circuit and system levels and a super-heterodyne architecture is proposed. A selective low-noise amplifier (LNA) is used at the circuit front-end to yield image and blocker rejection. Measurements for the RF front-end comprising an external balun, the selective LNA, a first downconversionmixer and an intermediate-frequency (IF) amplifier showed an overall noise figure of 11dB for a current consumption of 1.5mA under 1.2V. The high selectivity of the design yields an image rejection ratio of at least 50dB and allows to decrease linearity requirements and thus power consumption. A slightly improved version of the same front-end integrated together with the analog baseband signal processing chain but still using external local oscillators showed sensitivities of -96dBm at 100kbps symbol rate and -93dBm at 200kbps with an external state-of-the art FSK demodulator, allowing to extrapolate a global noise figure of 12.2dB for a global current consumption of 2.3mA under 1.2V. The proposed solution for the frequency synthesis uses both a BAW oscillator for the first downconversion to IF and a quadrature quasi-harmonic relaxation oscillator to translate the signals to baseband. The relaxation oscillator is embedded within a phase-locked loop (PLL) for which all the required blocks are discussed. Particularly, a novel modular multi-modulus frequency divider is presented, which does not necessitate complicated logic to yield the wanted division ratio and uses dynamic logic. The necessary digital circuitry to control the frequency generation is discussed as well. Finally, measurements for the complete receiver using the proposed frequency synthesis as well as digital control and demodulator implemented on FPGA are presented.

EPFL2008

In wireless portable applications, a large part of the signal processing is performed in the digital domain. Digital circuits show many advantages. The power consumption and fabrication costs are low even for high levels of complexity. A well established and highly automated design flow allows one to benefit from the constant progress in CMOS technologies. Moreover, digital circuits offer robust and programmable signal processing means and need no external components. Hence, the trend in consumer electronics is to further reduce the part of analog signal processing in the receiver chain of wireless transceivers. Consequently, analog-to-digital converters with higher resolutions and bandwidths are constantly required. The ultimate goal is the direct digitization of radio frequency signals, where the conversion would be performed immediately after the front-end amplifier. ΔΣ-modulation-based converters have proved to be the most suitable to achieve the required performance. Switched-capacitor implementations have been widely used over the last two decades. However, recent publications and books have shown that continuous-time architectures can achieve the same performance with lower power consumption. Most designs found throughout the literature use a single- or few-bit internal quantizer with a high-order modulation. As a result, in order to achieve the resolutions and bandwidths required today, the sampling frequency must exceed 100MHz. This approach leads to non-negligible power consumption in the clock generation. Moreover, the presence of such fast squared signals is not suitable for a system-on-chip comprising radio frequency receivers. In this thesis we propose a low-power strategy relying on a large number of internal levels rather than on a high sampling frequency or modulation order. Besides, a hybrid continuous-discrete-time approach is used to take advantage of the accuracy of switched-capacitor circuits and the low power consumption of continuous-time implementation. The sensitivity to clock jitter brought about by the continuous-time stage is reduced by the use of a large number of levels. An auto-ranging algorithm is developed in this thesis to overcome the limitation of a large-size quantizer under low-voltage supply. Finally, the strategy is applied to a design example addressing typical specifications for a Bluetooth receiver with direct conversion.

EPFL2007