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Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Adaptive simulation-based framework for error characterization of inexact circuits

Evo-Bots: A Simple, Stochastic Approach to Self-assembling Artificial Organisms

CASSIS: Characterization with Adaptive Sample-Size Inferential Statistics Applied to Inexact Circuits

Formal Verification of Integer Multipliers by Combining Gröbner Basis with Logic Reduction

FIR filters for hardware-based real-time multi-band image blending

Real-Time Hardware Implementation of Multi-Resolution Image Blending

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

Compressor Tree Synthesis on Commercial High-Performance FPGAs

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

CASSIS: Characterization with Adaptive Sample-Size Inferential Statistics Applied to Inexact Circuits

Formal Verification of Integer Multipliers by Combining Gröbner Basis with Logic Reduction

Real-Time Hardware Implementation of Multi-Resolution Image Blending

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Evo-Bots: A Simple, Stochastic Approach to Self-assembling Artificial Organisms

Adaptive simulation-based framework for error characterization of inexact circuits

FIR filters for hardware-based real-time multi-band image blending

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

Compressor Tree Synthesis on Commercial High-Performance FPGAs