Publications related to Dynamic logic (digital electronics)

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

This paper investigates the reduction of dynamic power for streaming applications yielded by asynchronous dataflow designs by using clock gating techniques. Streaming applications constitute a very broad class of computing algorithms in areas such as signa ...

2016

Enhanced Electrical Performance and Heat Dissipation in AlGaN/GaN Schottky Barrier Diodes Using Hybrid Tri-anode Structure

Elison de Nazareth Matioli, Jun Ma, Giovanni Santoruvo, Pulkit Tandon

Enhanced performance in AlGaN/GaN Schottky barrier diodes (SBDs) is investigated using a nanowire hybrid tri-anode structure that integrates 3-D Schottky junctions with tri-gate transistors. The fabricated SBDs presented an increased output current density ...

Institute of Electrical and Electronics Engineers2016

NEM Relay Design with Biconditional Binary Decision Diagrams

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Winston Jason Haaswijk

In this paper, we present an improved design flow for nanoelectromechanical (NEM) relay-based combinational logic circuits. Six-terminal NEM relays can be programmed to act as 2-to-1 multiplexers. We can therefore use NEM relays to implement arbitrary comb ...

IEEE2015

Jitter Analysis and Measurement in Subthreshold Source-Coupled Differential Ring Oscillators

Seyed Armin Tajalli, Mahsa Shoaran, Yusuf Leblebici

The jitter and the phase noise of ring oscillators utilizing subthreshold source-coupled logic (STSCL) style are analyzed in this paper. Closed-form equations are derived to predict the jitter and phase noise caused by white and flicker noise. Measurement ...

2015

A Relative Imaging CMOS Image Sensor for High Dynamic Range and High Frame-Rate Machine Vision Imaging Applications

Alexandre Schmid, Yusuf Leblebici, Vladan Popovic, Nikola Katic, Radisav Cojbasic

This paper proposes an unconventional image acquisition scheme for machine vision applications, based on detecting ratios of illumination (pixel) intensities. Detecting relative ratios enables capturing the scene features and patterns almost independently ...

Institute of Electrical and Electronics Engineers2015

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Hassan Ghasemzadeh Mohammadi

Controllable-Polarity Silicon Nanowire Transistors (CP-SiNWFETs) are among the promising candidates to complement or even replace the current CMOS technology in the near future. Polarity control is a desirable property that allows the on-line configuration ...

Institute of Electrical and Electronics Engineers2015

Multiple Independent Gate FETs: How Many Gates Do We Need?

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Subhasish Mitra

Multiple Independent Gate Field Effect Transistors (MIGFETs) are expected to push FET technology further into the semiconductor roadmap. In a MIGFET, supplementary gates either provide (i) enhanced conduction properties or (ii) more intelligent sw ...

IEEE2015

The EPFL Combinational Benchmark Suite

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we present the EPFL combinational benchmark suite. We aim at completing existing benchmark suites by focusing only on natively combinational benchmarks. The EPFL combinational benchmark suite consists of 23 combinational circuits desi ...

2015

Resolving the Memory Bottleneck for Single Supply Near-Threshold Computing

David Atienza Alonso, Mohamed Mostafa Sabry Aly

This paper focuses on a review of state-of-the-art memory designs and new design methods for near-threshold computing (NTC). In particular, it presents new ways to design reliable low-voltage NTC memories cost-effectively by reusing available cell librarie ...

IEEE/ACM Press2014

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Dynamic logic (digital electronics)

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs

Enhanced Electrical Performance and Heat Dissipation in AlGaN/GaN Schottky Barrier Diodes Using Hybrid Tri-anode Structure

NEM Relay Design with Biconditional Binary Decision Diagrams

Jitter Analysis and Measurement in Subthreshold Source-Coupled Differential Ring Oscillators

Design of High-Temperature SRAM for Reliable Operation Beyond 250 C

A Relative Imaging CMOS Image Sensor for High Dynamic Range and High Frame-Rate Machine Vision Imaging Applications

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Multiple Independent Gate FETs: How Many Gates Do We Need?

The EPFL Combinational Benchmark Suite

Resolving the Memory Bottleneck for Single Supply Near-Threshold Computing

Graph Chatbot

Chat with Graph Search

A Relative Imaging CMOS Image Sensor for High Dynamic Range and High Frame-Rate Machine Vision Imaging Applications

Enhanced Electrical Performance and Heat Dissipation in AlGaN/GaN Schottky Barrier Diodes Using Hybrid Tri-anode Structure

Resolving the Memory Bottleneck for Single Supply Near-Threshold Computing

Multiple Independent Gate FETs: How Many Gates Do We Need?

Jitter Analysis and Measurement in Subthreshold Source-Coupled Differential Ring Oscillators

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

The EPFL Combinational Benchmark Suite

NEM Relay Design with Biconditional Binary Decision Diagrams

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs

Design of High-Temperature SRAM for Reliable Operation Beyond 250 C