Infinite loop

Summary

In computer programming, an infinite loop (or endless loop) is a sequence of instructions that, as written, will continue endlessly, unless an external intervention occurs ("pull the plug"). It may be intentional. Overview This differs from "a type of computer program that runs the same instructions continuously until it is either stopped or interrupted". Consider the following pseudocode: how_many = 0 while is_there_more_data() do how_many = how_many + 1 end display "the number of items counted = " how_many The same instructions were run continuously until it was stopped or interrupted . . . by the FALSE returned at some point by the function is_there_more_data. By contrast, the following loop will not end by itself: birds = 1 fish = 2 while birds + fish > 1 do birds = 3 - birds fish = 3 - fish end birds will alternate being 1 or 2, while fish will alternate being 2 or 1. The loop will not stop unless an external intervention occurs ("pull the plug").

Official source

https://en.wikipedia.org/wiki/Infinite_loop

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A Friction Compensation Control for Power Steering

Robert Fuchs, Philippe Müllhaupt

The effects of friction are critical to the dynamics of electric power steering (EPS). On the one hand, friction contributes to the stability of the system and filters some of the disturbances (road vibration, etc.). On the other hand, it affects negatively the driving feel and refrains from accurate positioning of the steering wheel. Also, for steering manufacturers, friction hinders the development and tuning of the assistance strategy. Therefore, being able to control or eventually suppress friction in EPS is a real issue. In this paper, a control strategy for the active compensation of friction in a column-assist type electric power steering (C- EPS) is presented. The assist motor and the electronic control unit are used to cancel the friction effect in order to imitate the behavior of an ideal, frictionless system. The feasibility of this strategy is demonstrated on the power column (the upper part of the steering system) using the same information (signals) as that available in an actual product. The proposed control is based on a model of the power column including slip and load dependent friction forces. For this purpose, a detailed simulation model, developed and validated in a previous work, is reduced into a lower-order model to enable real time computation. The LuGre model is used to compute both the static and dynamic friction forces with continuous formulation. The control architecture is composed of two cascaded feedback loops. The internal loop estimates the internal friction of the system and compensates it through the motor input. The external loop contains a frictionless reference model used as a trajectory planner and a linear controller which attempts to minimize the error between the plant response and the reference response. The stability and the robustness of the control strategy are analyzed formally. Specifically, it is shown that the limit error between the plant and the reference responses can be made arbitrarily small with appropriate values of the gains. Experi- mental results demonstrate that the control strategy is successful in tracking the frictionless, reference trajectory and confirm the robustness against inaccurate friction parameters.

Ieee-Inst Electrical Electronics Engineers Inc2015

Software Dataplane Verification

Mihai Dobrescu

The industry is in the mood for programmable networks, where an operator can dynamically deploy network functions on network devices, akin to how one deploys virtual machines on physical machines in a cloud environment. Such flexibility brings along the threat of unpredictable behavior and performance. What are the minimum restrictions that we need to impose on network functionality such that we are able to verify that a network device behaves and performs as expected, for example, does not crash or enter an infinite loop? We present the result of working iteratively on two tasks: designing a domain-specific verification tool for packet-processing software, while trying to identify a minimal set of restrictions that packet-processing software must satisfy in order to be verification-friendly. Our main insight is that packet-processing software is a good candidate for domain-specific verification, for example, because it typically consists of distinct pieces of code that share limited mutable state; we can leverage this and other properties to sidestep fundamental verification challenges. We apply our ideas on Click packet-processing software; we perform complete and sound verification of an IP router and two simple middleboxes within tens of minutes, whereas a state-of-the-art general-purpose tool fails to complete the same task within several hours.

Association for Computing Machinery2015

The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and microsecond-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. In particular, dataplanes borrow design elements from network middleboxes to run tasks to completion in tight loops. In its basic form, the dataplane design leverages sweeping simplifications such as the elimination of any resource management and any task scheduling to improve throughput and lower latency. As a result, dataplanes perform best when the request rate is predictable (since there is no resource management) and the service time of each task has a low execution time and a low dispersion. On the other hand, they exhibit poor energy proportionality and workload consolidation, and suffer from head-of-line blocking. This thesis proposes the introduction of resource management to dataplanes. Current dataplanes decrease latency by constantly polling for incoming network packets. This approach trades energy usage for latency. We argue that it is possible to introduce a control plane, which manages the resources in the most optimal way in terms of power usage without affecting the performance of the dataplane. Additionally, this thesis proposes the introduction of scheduling to dataplanes. Current designs operate in a strict FIFO and run-to-completion manner. This method is effective only when the incoming request requires a minimal amount of processing in the order of a few microseconds. When the processing time of requests is (a) longer or (b) follows a distribution with higher dispersion, the transient load imbalances and head-of-line blocking deteriorate the performance of the dataplane. We claim that it is possible to introduce a scheduler to dataplanes, which routes requests to the appropriate core and effectively reduce the tail latency of the system while at the same time support a wider range of workloads.

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A Friction Compensation Control for Power Steering

Robert Fuchs, Philippe Müllhaupt

Ieee-Inst Electrical Electronics Engineers Inc2015