Publications related to EEPROM

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Zhenyu Wang, Asmund Kjellegaard Ottesen, Yanfei Zhao, Guilherme Migliato Marega, Hyungoo Ji

Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector ...

2023

Towards Stable and Efficient Adversarial Training against $l_1$ Bounded Adversarial Attacks

Sabine Süsstrunk, Mathieu Salzmann, Yulun Jiang, Chen Liu, Zhuoyi Huang

We address the problem of stably and efficiently training a deep neural network robust to adversarial perturbations bounded by an

l_1

norm. We demonstrate that achieving robustness against

l_1

-bounded perturbations is more challenging than in the

l_2

...

2023

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Andras Kis, Guilherme Migliato Marega

Two-dimensional materials (2DMs) have found potential applications in many areas of electronics, such as sensing, memory systems, optoelectronics, and power. Despite an intense experimental work, the literature is lacking of accurate modeling of nonvolatil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

Mohammad Khaja Nazeeruddin, Peng Gao, Hobeom Kim

Here we use triple-cation metal-organic halide perovskite single crystals for the transistor channel of a flash memory device. Moreover, we design and demonstrate a 10 nm thick single-layer nanofloating gate. It consists of a ternary blend of two organic s ...

2020

OneFile: A Wait-free Persistent Transactional Memory

Nachshon Cohen, Pascal Felber

A persistent transactional memory (PTM) library provides an easy-to-use interface to programmers for using byte-addressable non-volatile memory (NVM). Previously proposed PTMs have, so far, been blocking. We present OneFile, the first wait-free PTM with in ...

IEEE COMPUTER SOC2019

Dynamically reconfigurable DEAs incorporating shape memory polymer fibers

Herbert Shea, Bekir Aksoy

We present variable stiffness dielectric elastomer actuators (DEAs), combining a single DEA actuator with embedded shape memory polymer (SMP) fibers, which can be electrically addressed to locally reduce the stiffness by a factor of 100. The device accommo ...

SPIE-INT SOC OPTICAL ENGINEERING2019

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Alexandre Sébastien Julien Levisse, Pierre-Emmanuel Julien Marc Gaillardon

With the continuous scaling of CMOS technology, integrating an embedded high-density non-volatile memory appears to be more and more costly and technologically challenging. Beyond floating-gate memory technologies, bipolar resistive random access memories ...

2018

Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices

Mihai Adrian Ionescu, Igor Stolichnov

Edge computing requires highly energy efficient microprocessor units with embedded non-volatile memories to process data at IoT sensor nodes. Ferroelectric non-volatile memory devices are fast, low power and high endurance, and could greatly enhance energy ...

IEEE2018

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EEPROM

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

Towards Stable and Efficient Adversarial Training against $l_1$ Bounded Adversarial Attacks

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

OneFile: A Wait-free Persistent Transactional Memory

Dynamically reconfigurable DEAs incorporating shape memory polymer fibers

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices

Graph Chatbot

Chat with Graph Search

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

OneFile: A Wait-free Persistent Transactional Memory

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

Dynamically reconfigurable DEAs incorporating shape memory polymer fibers

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices