Concept
Boolean algebra
Related concepts (128)
Inverter (logic gate)
In digital logic, an inverter or NOT gate is a logic gate which implements logical negation. It outputs a bit opposite of the bit that is put into it. The bits are typically implemented as two differing voltage levels. The NOT gate outputs a zero when given a one, and a one when given a zero. Hence, it inverts its inputs. Colloquially, this inversion of bits is called "flipping" bits. As with all binary logic gates, other pairs of symbols such as true and false, or high and low may be used in lieu of one and zero.
Field of sets
In mathematics, a field of sets is a mathematical structure consisting of a pair consisting of a set and a family of subsets of called an algebra over that contains the empty set as an element, and is closed under the operations of taking complements in finite unions, and finite intersections. Fields of sets should not be confused with fields in ring theory nor with fields in physics. Similarly the term "algebra over " is used in the sense of a Boolean algebra and should not be confused with algebras over fields or rings in ring theory.
Exclusive or
Exclusive or or exclusive disjunction or exclusive alternation, also known as non-equivalence which is the negation of equivalence, is a logical operation that is true if and only if its arguments differ (one is true, the other is false). It is symbolized by the prefix operator and by the infix operators XOR (ˌɛks_ˈɔ:r, ˌɛks_ˈɔ:, 'ksɔ:r or 'ksɔ:), EOR, EXOR, , , , ⩛, , and . It gains the name "exclusive or" because the meaning of "or" is ambiguous when both operands are true; the exclusive or operator excludes that case.
Logic synthesis
In computer engineering, logic synthesis is a process by which an abstract specification of desired circuit behavior, typically at register transfer level (RTL), is turned into a design implementation in terms of logic gates, typically by a computer program called a synthesis tool. Common examples of this process include synthesis of designs specified in hardware description languages, including VHDL and Verilog. Some synthesis tools generate bitstreams for programmable logic devices such as PALs or FPGAs, while others target the creation of ASICs.
Karnaugh map
The Karnaugh map (KM or K-map) is a method of simplifying Boolean algebra expressions. Maurice Karnaugh introduced it in 1953 as a refinement of Edward W. Veitch's 1952 Veitch chart, which was a rediscovery of Allan Marquand's 1881 logical diagram aka Marquand diagram but with a focus now set on its utility for switching circuits. Veitch charts are also known as Marquand–Veitch diagrams or, rarely, as Svoboda charts, and Karnaugh maps as Karnaugh–Veitch maps (KV maps).
Relay logic
Relay logic is a method of implementing combinational logic in electrical control circuits by using several electrical relays wired in a particular configuration. ladder logic The schematic diagrams for relay logic circuits are often called line diagrams, because the inputs and outputs are essentially drawn in a series of lines. A relay logic circuit is an electrical network consisting of lines, or rungs, in which each line or rung must have continuity to enable the output device.
GF(2)
(also denoted , Z/2Z or ) is the finite field of two elements (GF is the initialism of Galois field, another name for finite fields). Notations Z_2 and may be encountered although they can be confused with the notation of 2-adic integers. GF(2) is the field with the smallest possible number of elements, and is unique if the additive identity and the multiplicative identity are denoted respectively 0 and 1, as usual. The elements of GF(2) may be identified with the two possible values of a bit and to the boolean values true and false.
Bit array
A bit array (also known as bitmask, bit map, bit set, bit string, or bit vector) is an array data structure that compactly stores bits. It can be used to implement a simple set data structure. A bit array is effective at exploiting bit-level parallelism in hardware to perform operations quickly. A typical bit array stores kw bits, where w is the number of bits in the unit of storage, such as a byte or word, and k is some nonnegative integer. If w does not divide the number of bits to be stored, some space is wasted due to internal fragmentation.
Zhegalkin polynomial
Zhegalkin (also Žegalkin, Gégalkine or Shegalkin) polynomials (полиномы Жегалкина), also known as algebraic normal form, are a representation of functions in Boolean algebra. Introduced by the Russian mathematician Ivan Ivanovich Zhegalkin in 1927, they are the polynomial ring over the integers modulo 2. The resulting degeneracies of modular arithmetic result in Zhegalkin polynomials being simpler than ordinary polynomials, requiring neither coefficients nor exponents. Coefficients are redundant because 1 is the only nonzero coefficient.
Predicate functor logic
In mathematical logic, predicate functor logic (PFL) is one of several ways to express first-order logic (also known as predicate logic) by purely algebraic means, i.e., without quantified variables. PFL employs a small number of algebraic devices called predicate functors (or predicate modifiers) that operate on terms to yield terms. PFL is mostly the invention of the logician and philosopher Willard Quine. The source for this section, as well as for much of this entry, is Quine (1976).