Publications related to Control unit

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Shashwat Shrivastava, Ognjen Glamocanin, Jinwei Yao, Nour Ardo

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, high-level synthesis (HLS) tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed in conjunction with operation scheduling to ensure th ...

New York2023

Training Efficient Controllers via Analytic Policy Gradient

Dario Floreano, Valentin Wüest, Davide Scaramuzza

Control design for robotic systems is complex and often requires solving an optimization to follow a trajectory accurately. Online optimization approaches like Model Predictive Control (MPC) have been shown to achieve great tracking performance, but requir ...

2023

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, HLS tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed together with operation scheduling to ensure the best possible unit usage at ...

IEEE2022

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud, David Dervishi

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

2022

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Halima Najibi

Flow cell arrays (FCAs) concurrently provide efficient on-chip liquid cooling and electrochemical power generation. This technology is especially promising for three-dimensional multi-processor systems-on-chip (3D MPSoCs) realized in deeply scaled technolo ...

2022

Dynamic Probabilistic Pruning: A General Framework for Hardware-Constrained Pruning at Different Granularities

Alexandre Schmid, Lizeth Gonzalez Carabarin

Unstructured neural network pruning algorithms have achieved impressive compression ratios. However, the resulting-typically irregular-sparse matrices hamper efficient hardware implementations, leading to additional memory usage and complex control logic t ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A Noise-Resistant Mixed-Discrete Particle Swarm Optimization Algorithm for the Automatic Design of Robotic Controllers

Alcherio Martinoli, Cyrill Silvan Baumann

The automatic design of well-performing robotic controllers is still an unsolved problem due to the inherently large parameter space and noisy, often hard-to-define performance metrics, especially when sequential tasks need to be accomplished. Distal contr ...

2022

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Touradj Ebrahimi

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Control unit

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Resource Sharing in Dataflow Circuits

Training Efficient Controllers via Analytic Policy Gradient

Gate unit for a gate-commutated thyristor and integrated gate-commutated thyristor

Resource Sharing in Dataflow Circuits

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

Dynamic Probabilistic Pruning: A General Framework for Hardware-Constrained Pruning at Different Granularities

A Noise-Resistant Mixed-Discrete Particle Swarm Optimization Algorithm for the Automatic Design of Robotic Controllers

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Graph Chatbot

Chat with Graph Search

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Resource Sharing in Dataflow Circuits

Resource Sharing in Dataflow Circuits

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

A Noise-Resistant Mixed-Discrete Particle Swarm Optimization Algorithm for the Automatic Design of Robotic Controllers

Training Efficient Controllers via Analytic Policy Gradient

Dynamic Probabilistic Pruning: A General Framework for Hardware-Constrained Pruning at Different Granularities

Gate unit for a gate-commutated thyristor and integrated gate-commutated thyristor