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This lecture covers the fundamentals of Very Large Scale Integration (VLSI) design, focusing on digital integrated circuits at the circuit level. It includes topics such as technology scaling, basic gate design, circuit optimization, and complex system composition. The course structure involves theory lectures, lab sessions with ASIC design tools, assignments, and a project. Grading is based on a project report and a final exam. Labs are conducted using industry-standard EDA tools available on EPFL servers, with collaboration through Zoom. The detailed course schedule includes topics like logical effort, interconnect modeling, memories, and low-power design. Recommended literature includes books on CMOS VLSI design.