Publications by Somayyeh Rahimian Omam

A Study on Buffer Distribution for RRAM-based FPGA Routing Structures

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Somayyeh Rahimian Omam

Compared to Application-Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) provide reconfigurablity at the cost of lower performance and higher power consumption. Exploiting a large number of programmable switche ...

IEEE2015

Signaling in 3-D integrated circuits, benefits and challenges

Somayyeh Rahimian Omam

Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...

EPFL2015

Parallel vs. Serial Inter-plane communication using TSVs

Giovanni De Micheli, Yusuf Leblebici, Somayyeh Rahimian Omam

3-D integration is a promising prospect for implementing high performance multifunctional systems-on- chip. Through Silicon Vias (TSVs) are the enablers for achieving high bandwidth paths in inter-plane communications. TSVs also provide higher vertical lin ...

2014

An Enhanced Design Methodology for Resonant Clock Trees

Giovanni De Micheli, Xifan Tang, Vasileios Pavlidis, Somayyeh Rahimian Omam

Clock distribution networks consume a considerable portion of the power dissipated by synchronous circuits. In conventional clock distribution networks, clock buffers are inserted to retain signal integrity along the long interconnects, which, in turn, sig ...

American Scientific Publishers2013

A Low-Overhead Method for Pre-bond Test of Resonant 3-D Clock Distribution Networks

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low power alternatives to con- ventional ...

2012

Low-power clock distribution networks for 3-D ICs

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low-power alternatives to conventional cl ...

2012

Inter-Plane Communication Methods for 3-D ICs

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Three-dimensional (3-D) integration is an emerging candidate for implementing high performance multifunctional systems-on-chip. Employing an efficient medium for data communication among different planes is a key factor in achieving a high performance 3-D ...

American Scientific Publishers2012

Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low-power alternatives to conventional cl ...

Springer-Verlag2011