A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC
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Ultra low power circuits are in high demand in many applications especially in wireless sensor networks (WSN), where energy is scavenged from environment. WSN systems contain different blocks, such as: sensors, filters, analog-to-digital converters, very o ...
Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. In the sub-threshold regime circuit delay, hence the leakage energy consumption depends on the supply voltage exponentially. By reducing t ...
Multi-bit feedback, being one way of lowering ΔΣ modulators power consumption, has a major obstacle: the number of components in the internal analog-to-digital converter (ADC) and digital-to-analog converter (DAC). Nevertheless, the number of comparators i ...
This paper discusses techniques, limitations and possible future developments of circuits based on transistors operated in the weak inversion (w.i.) mode, also called subthreshold mode. In analog circuits, w.i. is reached at very low current, but it is als ...
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In wireless portable applications, a large part of the signal processing is performed in the digital domain. Digital circuits show many advantages. The power consumption and fabrication costs are low even for high levels of complexity. A well established a ...
This paper presents the design, realization and characterization of a new hybrid A/D converter based on a combined incremental and cyclic conversion. The proposed implementation offers a configurable resolution, and permits to share the same hardware for t ...
An ultra low power 8-bit current-mode successive approximation (SAR) analog-to-digital (ADC) converter for Wireless Sensor Network (WSN) applications is presented. The proposed ADC contains a new asynchronous clock generator, which works only during data p ...
2007
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This article presents a novel approach for implementing ultra-low power digital components and systems using source-coupled logic (SCL) circuit topology, operating in weak inversion (sub-threshold) regime. PMOS transistors with shorted drain-substrate cont ...
2008
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In this paper, we study the operation of MOS current-mode logic (MCML) gates at lower-than-nominal supply voltages.We show that power can be traded for speed by reducing the supply voltage below the nominal value, while the power-delay product stays nearly ...
2007
,
Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. In the sub-threshold regime the circuit delay, and hence, the leakage energy consumption depend on the supply voltage exponentially. By re ...
