A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC
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An ultra low power 8-bit current-mode successive approximation (SAR) analog-to-digital (ADC) converter for Wireless Sensor Network (WSN) applications is presented. The proposed ADC contains a new asynchronous clock generator, which works only during data p ...
This paper discusses techniques, limitations and possible future developments of circuits based on transistors operated in the weak inversion (w.i.) mode, also called subthreshold mode. In analog circuits, w.i. is reached at very low current, but it is als ...
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Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. In the sub-threshold regime the circuit delay, and hence, the leakage energy consumption depend on the supply voltage exponentially. By re ...
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Multi-bit feedback, being one way of lowering ΔΣ modulators power consumption, has a major obstacle: the number of components in the internal analog-to-digital converter (ADC) and digital-to-analog converter (DAC). Nevertheless, the number of comparators i ...
Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. In the sub-threshold regime circuit delay, hence the leakage energy consumption depends on the supply voltage exponentially. By reducing t ...
Ultra low power circuits are in high demand in many applications especially in wireless sensor networks (WSN), where energy is scavenged from environment. WSN systems contain different blocks, such as: sensors, filters, analog-to-digital converters, very o ...
This article presents a novel approach for implementing ultra-low power digital components and systems using source-coupled logic (SCL) circuit topology, operating in weak inversion (sub-threshold) regime. PMOS transistors with shorted drain-substrate cont ...
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