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An ultra low power 8-bit current-mode successive approximation (SAR) analog-to-digital (ADC) converter for Wireless Sensor Network (WSN) applications is presented. The proposed ADC contains a new asynchronous clock generator, which works only during data processing and is turned off afterwards, thus enabling a power saving mode. The clock generator is controlled by a bias current, and can be adjusted for a wide range of sampling frequencies. The proposed ADC with the clock generator occupy a chip area of 3500 μm2 and dissipate 400nW power from a 0.6V supply voltage in a CMOS 0.18-μm technology, enabling input data processing with a frequency of 100 kHz.
David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Rafael Medina Morillas, Joshua Alexander Harrison Klein
Edoardo Charbon, Claudio Bruschini, Ekin Kizilkan, Pouyan Keshavarzian, Francesco Gramuglia, Myung Jae Lee