Publication

A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC

Related publications (38)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC

Graph Chatbot

Chat with Graph Search

Near Hysteresis-Free Negative Capacitance InGaAs Tunnel FETs with Enhanced Digital and Analog Figures of Merit below V-DD=400mV

Design Techniques for Ultra High Frequency Clock Generation in 28 nm FDSOI Technology

A Hybrid CDAC-Threshold Configuring SAR ADC in 28nm FDSOI CMOS

A low-voltage CMOS-compatible time-domain photodetector, device & front end electronics

A Subthreshold Current-Sensing Sigma-Delta Modulator for Low-Voltage and Low-Power Sensor Interfaces

A Low Power On-Chip Class-E Power Amplifier For Remotely Powered Implantable Sensor Systems

A Configurable IC to Control, Readout and Calibrate an Array of Biosensors

On-Chip Digital Background Calibration of Pipelined Analog-to-Digital Converters using Digital Assistance to support Nonlinear Residue Amplification

Two-Port Low-Power Gain-Cell Storage Array: Voltage Scaling and Retention Time