Publications related to TED+: A Data Structure for Microprocessor Verification

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Anupam Chattopadhyay

Realization of logic and storage operations in memristive circuits have opened up a promising research direction of in-memory computing. Elementary digital circuits, e.g., Boolean arithmetic circuits, can be economically realized within memristive circuits ...

Ieee2016

Majority logic synthesis

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

A method for optimizing an implementation of a logic circuit, comprising steps of providing an interpretation of the logic circuit in terms of 3 Boolean variable majority operators M, with each of the majority operators being a function of a plurality of v ...

2015

Improved carry chain mapping for the VTR flow

Paolo Ienne, Grace Zgheib, David Novo Bruna, Ana Petkovska

Carry chains facilitate the implementation of adders and improve the performance of arithmetic circuits in FPGAs. The last version of the commonly used open-source Verilog-to-Routing (VTR) CAD flow now enables modelling carry chains in FPGA architectures. ...

IEEE2015

Restructuring of Arithmetic Circuits with Biconditional Binary Decision Diagrams

Giovanni De Micheli, Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Biconditional Binary Decision Diagrams (BBDDs) are a novel class of canonical binary decision diagrams where the branching condition, and its associated logic expansion is biconditional on two variables. In this demonstration we use an effici ...

2014

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we present biconditional binary deci- sion diagrams (BBDDs), a novel canonical representation form for Boolean functions. BBDDs are binary decision diagrams where the branching condition, and its associated logic expansion, is biconditional ...

2014

A New Basic Logic Structure for Data-Path Computation

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Nowadays, Field Programmable Gate Arrays (FPGA) implement arithmetic functions using specific circuits at the logic block level, such as the carry paths, or at the structure level adopting Digital Signal Processing (DSP) blocks. Nevertheless, all these app ...

2014

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Silicon NanoWire (SiNW) based Field Effect Tran- sistors (FETs) are promising candidates to extend Moore’s law in the coming years. Recently, Double-Gate (DG) SiNWFETs have been demonstrated to allow on-line configurability of n -type and p -type device po ...

2013

On the Generation of Precise Fixed-Point Expressions

Viktor Kuncak, Eva Darulova, Indranil Saha

Several problems in the implementations of control systems, signal-processing systems, and scientific computing systems reduce to compiling a polynomial expression over the reals into an imperative program using fixed-point arithmetic. Fixed-point arithmet ...

2013

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TED+: A Data Structure for Microprocessor Verification

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Majority logic synthesis

Improved carry chain mapping for the VTR flow

Sound Compilation of Reals

Restructuring of Arithmetic Circuits with Biconditional Binary Decision Diagrams

Programming with Numerical Uncertainties

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

A New Basic Logic Structure for Data-Path Computation

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

On the Generation of Precise Fixed-Point Expressions

Graph Chatbot

Chat with Graph Search

Programming with Numerical Uncertainties

Improved carry chain mapping for the VTR flow

Sound Compilation of Reals

Majority logic synthesis

Restructuring of Arithmetic Circuits with Biconditional Binary Decision Diagrams

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

A New Basic Logic Structure for Data-Path Computation

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

On the Generation of Precise Fixed-Point Expressions

The Programmable Logic-in-Memory (PLiM) Computer (Invited)