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Simulation of Double-Gate Silicon Tunnel FETs with a High-k Gate Dielectric

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A hybrid III-V tunnel FET and MOSFET technology platform integrated on silicon

Mihai Adrian Ionescu, Kirsten Emilie Moselund, Clarissa Convertino

InGaAs/GaAsSb tunnelling field-effect transistors and InGaAs metal-oxide-semiconductor field-effect transistors can be integrated on the same silicon substrate using conventional CMOS-compatible processes, creating a platform for potential use in low-power ...

NATURE RESEARCH2021

P-GaN Tri-Gate MOS Structure for Normally-Off GaN Power Transistors

Elison de Nazareth Matioli, Pirouz Sohi, Jun Ma, Luca Nela, Catherine Erine, Minghua Zhu

In this letter, we present a new concept for normally-off AlGaN/GaN-on-Si MOS-HEMTs based on the combination of p-GaN, tri-gate and MOS structures to achieve high threshold voltage (V-TH) and low on-resistance (R-ON). The p-GaN is used to engineer the band ...

2021

Adaptive Body Biasing in Strong Body Factor Technologies

Thomas Christoph Müller

With the advent of intelligent sensor nodes in everyday life, low power aspects of system design become more and more important. Adaptive body biasing is a promising methodology to achieve dynamic adaptation of the tradeoff between performance and energy b ...

EPFL2021

p-GaN field plate for low leakage current in lateral GaN Schottky barrier diodes

Elison de Nazareth Matioli, Luca Nela, Catherine Erine

High-voltage gallium nitride Schottky barrier diodes (SBDs) suffer from large off-state leakage current, which further degrades during operation at high temperatures and limits the device blocking capabilities. The key to achieving low off-state leakage is ...

2021

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Nanowire-based devices can potentially be of use in a variety of electronic applications, from ultrascaled digital circuits to 5G communication networks. However, the devices are typically restricted to low-power applications due to the relatively low elec ...

NATURE RESEARCH2021

An Analog-Assisted Digital LDO With Single Subthreshold Output pMOS Achieving 1.44-fs FOM

Kyojin Choo, Li Xu

This letter describes an analog-assisted digital LDO that cascades a conventional digital LDO structure with a single, large output pMOS biased in subthreshold to enable fast response to output voltage droop. By digitally controlling the gate voltage of th ...

IEEE2021

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In this work, we propose a simple and yet accurate physical model to describe the figures-of-merit (FOMs) of lateral GaN power devices. While the performance limit of vertical devices is well understood, the FOMs of lateral devices are not properly describ ...

2021

Hydrogenated amorphous silicon (a-Si:H) can be produced by plasma-enhanced chemical vapor deposition (PECVD) of SiH4 (silane) mixed with hydrogen. The resulting material shows outstanding radiation hardness properties and can be deposited on a wide variety ...

2021

Hard-Switching Losses in Power FETs: The Role of Output Capacitance

Elison de Nazareth Matioli, Armin Jafari, Palliyage Srilak Nirmana Perera, Reza Soleiman Zadeh Ardebili

For certain field-effect transistors (FETs) in soft-switching operation, the large-signal behavior of their output capacitance ( Co ) has shown to deviate considerably from the datasheet values. This can have a significant effect on hard-switching losses i ...

2021

LiNiO Gate Dielectric with Tri-Gate Structure for High Performance E-mode GaN transistors

Elison de Nazareth Matioli, Luca Nela, Taifang Wang

In this work, a Tri-Gate AlGaN/GaN metal-oxide-semiconductor high electron mobility transistor (MOSHEMT) with lithium nickel oxide (LiNiO) gate dielectric is demonstrated for enhancement-mode (e-mode) operation. The high-quality of pulse-laser-deposited (P ...

IEEE2021