This paper presents a detailed analysis of the CMOS Current Steering Logic (CSL) technique and compares experimentally its digital switching noise to that of the CMOS static logic. Theoretical analysis of the CSL inverter is developed. More complex gates using this technique are presented. Results are validated by simulations and measurement.
Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Mario Stipcevic