Lukasiewicz fuzzy logic networks and their ultra low power hardware implementation

In this paper, we propose a new category of current-mode Łukasiewicz OR and AND logic neurons and ensuing logic networks along with their ultra-low power realization. The introduced circuits can operate in a wide range of the input signals varying in-between 10 nA and 10 mA. For low current values the operating point of transistors is set in the under threshold region. In this region, the mismatch between transistors exhibits a far stronger impact on the current mirror precision than the one observed in case of the strong inversion region. The proposed design alleviates this problem by reducing the number of current mirrors between the input and the output of the neuron and of the overall network to only one. Łukasiewicz operators require only summation and subtraction operations, which make them suitable for realization in analog current-mode technique. In this case even large number of input signals can be summed in a simple junction in a single step. This is the reason of choosing Łukasiewicz operations in the proposed circuit. Using other t-norm and t-conorm operations with multiplication and division operations would make the realization of the circuit very difficult and inefficient.