A miniaturised autonomous sensor based on nanowire materials platform: the SiNAPS mote

A micro-power energy harvesting system based on core(crystalline Si)-shell(amorphous Si) nanowire solar cells together with a nanowire-modified CMOS sensing platform have been developed to be used in a dust-sized autonomous chemical sensor node. The mote (SiNAPS) is augmented by low-power electronics for power management and sensor interfacing, on a chip area of 0.25mm(2). Direct charging of the target battery (e. g., NiMH microbattery) is achieved with end-to-end efficiencies up to 90% at AM1.5 illumination and 80% under 100 times reduced intensity. This requires matching the voltages of the photovoltaic module and the battery circumventing maximum power point tracking. Single solar cells show efficiencies up to 10% under AM1.5 illumination and open circuit voltages, Voc, of 450-500mV. To match the battery's voltage the miniaturised solar cells (similar to 1mm(2) area) are connected in series via wire bonding. The chemical sensor platform (mm 2 area) is set up to detect hydrogen gas concentration in the low ppm range and over a broad temperature range using a low power sensing interface circuit. Using Telran TZ1053 radio to send one sample measurement of both temperature and H-2 concentration every 15 seconds, the average and active power consumption for the SiNAPS mote are less than 350nW and 2.1 mu W respectively. Low-power miniaturised chemical sensors of liquid analytes through microfluidic delivery to silicon nanowires are also presented. These components demonstrate the potential of further miniaturization and application of sensor nodes beyond the typical physical sensors, and are enabled by the nanowire materials platform.

Characterisation of Silicon Heterojunction Solar Cells Beyond Standard Test Conditions

Jean Cattin

The global photovoltaic market is mostly dominated by solar cells based on crystalline silicon (c-Si), which are covering 95% of the market. This thesis concerns silicon heterojunction (SHJ), a high-efficiency technology with a 2% market share in 2018, but showing a steady global production capacity growth and potential for industry-compatible modules with a conversion efficiency above 21%. This thesis focuses on improving the device efficiency in real operating conditions. More specifically, different effects affecting a cell used in non-standard conditions are assessed, including different temperatures and illuminations, during prolonged exposure to light and the effect of surface inhomogeneities. The main SHJ technology specificity consists of the use of thin hydrogenated amorphous silicon (a-Si) layers that provide excellent c-Si surface passivation. This enables very high operating voltages compared to other c-Si-based technologies, which directly reduces the loss of efficiency induced by higher operating temperatures. The cell's properties are measured at very low temperatures are studied, which amplifies charges transport phenomena. The voltage shows a deviation from its theoretical curve, which we explain to be related to a decrease of the positive contact holes selectivity due to the influence of the transparent conductive oxide layer. An increase in the resistive losses at low temperature is measured. These losses are caused by a resistivity increase in the different a-Si layers and interfaces because of a thermal energy decrease at low temperatures. These effects may also affect cell performances at room temperature and under operating conditions. This implies that optimisation at standard test conditions (STC), generally used to assess the performance of PV modules, does not necessarily result in the same optimum as in real climatic conditions, which generally correspond to a higher temperature and/or a lower illumination. We show that by adding carbon in the front doped layer, a transparency increase, and thus a current gain is observed at the expense of larger ohmic losses, which overall reduces the efficiency at STC. Using simulations and real climate data, we show that using such a layer leads to a relative energy production gain of 0.5 to 0.8%, both in a moderate and arid climate. Another specificity of SHJ cells is a slight efficiency increase when exposed to light for a few days. We show that in case of a too-small positive doped layer charges reserve, cell performance degradation is observed instead of an improvement. In order to avoid such degradation, the positively doped layer should be sufficiently thick and doped to screen the influence of the subsequent transparent conductive oxide layer. A treatment in which a forward bias voltage is applied to the cell allows triggering the gain in efficiency without causing the detrimental effects of light exposure. Finally, the influence of a non-homogeneous surface is studied. Parasitic electric currents are induced between the well-passivated area and poor passivation area through the metallisation. Using dedicated samples, correspondence between these currents, and an often measured drop of the low injection lifetime is described and linked to the detrimental effect of either the sample edges or by surface defects. Concretely, these effects can affect the performances of the cell at low illumination, reducing the performances in real outdoor conditions.

EPFL2020

Amorphous/Crystalline Silicon Interface Passivation: Ambient-Temperature Dependence and Implications for Solar Cell Performance

Christophe Ballif, Stefaan De Wolf, Bénédicte Demaurex, Johannes Peter Seif

Silicon heterojunction (SHJ) solar cells feature amorphous silicon passivation films, which enable very high voltages. We report how such passivation increases with operating temperature for amorphous silicon stacks involving doped layers and decreases for intrinsic-layer-only passivation. We discuss the implications of this phenomenon on the solar cell's temperature coefficient, which represents an important figure-of-merit for the energy yield of devices deployed in the field. We show evidence that both open-circuit voltage (V-oc) and fill factor (FF) are affected by these variations in passivation and quantify these temperature-mediated effects, compared with those expected from standard diode equations. We confirm that devices with high V-oc values at 25 degrees C show better high-temperature performance. However, we also argue that the precise device architecture, such as the presence of charge-transport barriers, may affect the temperature-dependent device performance as well.

Ieee-Inst Electrical Electronics Engineers Inc2015

Textured silicon heterojunction solar cells with over 700mV open-circuit voltage studied by transmission electron microscopy

Christophe Ballif, Stefaan De Wolf, Luc Fesquet, Aïcha Hessler-Wyser, Christian Monachon

In this article, we report on the use of transmission electron microscopy (TEM) for the fabrication of high-performance textured amorphous/crystalline silicon (a-Si:H/c-Si) heterojunction (HJ) solar cells. Whereas classical thin-film characterization techniques allowed us to optimize the a-Si:H layer properties for flat HJ solar cells (open-circuit voltages (VOC) up to 710 mV and energy conversion efficiencies up to 19.1%), these techniques can not always be fully exploited on textured c-Si surfaces. Nevertheless, in this situation, TEM micrographs permit us to identify device performance limiting factors, such as, e.g., local epitaxy in pyramid valleys as the main source of our VOC-loss. Minimizing this local epitaxy by adjusting the amorphous Si based layers growth conditions and improving the c-Si surface morphology yields Si HJ solar cells with VOCs over 700 mV.

2008

Characterisation of Silicon Heterojunction Solar Cells Beyond Standard Test Conditions

Jean Cattin

EPFL2020