Publication
Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology
Davide Sacchetto, Yusuf Leblebici, Jury Sandrini, Tugba Demirci, Maxime Victor Thammasack
2015
Conference paper
2015
Conference paper
Abstract
This paper presents a read-write design solution for passive ReRAM crossbar memory arrays to overcome the sneak current paths problem. The proposed circuitry includes an auto-calibration feature to overcome the sneak current effects during the READ operation, and a WRITE protocol to minimize the current at each row and column lines. The presented circuit has been designed in 180 nm standard CMOS technology based on the electrical characteristics of fabricated ReRAM devices.
Official source
About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.