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Design and Implementation of a 46-kS/s CMOS SC Dual-Mode Capacitive Sensor Interface With 50-dB SNR and 0.7% Nonlinearity

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Design and Implementation of a 46-kS/s CMOS SC Dual-Mode Capacitive Sensor Interface With 50-dB SNR and 0.7% Nonlinearity

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Low-Noise, High-Density Microelectronics for Multi-Mode Screening of Excitable Biological Cells

Performance of Self-Seeded Parametric Multicasting of Analog Signals

Clock jitter estimation in noise

A Navigation-Grade MEMS Accelerometer based on a Versatile Front End

AM Modulation-based CMOS Readout Circuit for High-density Microelectrode Arrays

Low-distortion switched-capacitor event-driven analogue to-digital converter

Using measured instead of perceived noise in hedonic models

A Micropower Neural Recording Amplifier with Improved Noise Efficiency Factor

A 300Hz 19b DR capacitive accelerometer based on a versatile front end in a 5th-order ΔΣ loop

MOS current-mode logic standard cells for high-speed low-noise applications