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Design and Analysis of Jitter-Aware Low-Power and High-Speed TSV Links for 3D ICs

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Design and Analysis of Jitter-Aware Low-Power and High-Speed TSV Links for 3D ICs

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Energy- and Cost-Efficient VLSI DSP Systems Design with Approximate Computing

Thin Hydrogel-Elastomer Multilayer Encapsulation for Soft Electronics

Copper TSV-Based Process Development for Die-Level Homogeneous and Heterogeneous 3D Integration Platform

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Method and apparatus for low power chip-to-chip communications with constrained ISI ratio

Robustness Analysis of Controllable-Polarity Silicon Nanowire Devices and Circuits

Hybrid NRZ/Multi-Tone Signaling for High-Speed Low-Power Wireline Transceivers

New Data Structures and Algorithms for Logic Synthesis and Verification

Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory

Method for code evaluation using ISI ratio