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Computationally Efficient Multiple-Independent-Gate Device Model

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Computationally Efficient Multiple-Independent-Gate Device Model

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Low-Noise Microwave Performance of 0.1 mu m Gate AlInN/GaN HEMTs on SiC

Characterization of Plasma-Induced Damage of Selectively Recessed GaN/InAlN/AlN/GaN Heterostructures Using SiCl4 and SF6

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Semiconductor device and method of manufacturing a semiconductor device

Control of Ferromagnetism in a (Ga,Mn)As - Based Multiferroic System via a Ferroelectric Gate

Fabrication and Characterization of Vertically Stacked Gate-All-Around Si Nanowire FET Arrays

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

A model for robust electrostatic design of nanowire FETs with arbitrary polygonal cross sections

Oscillator Based on Suspended Gate MOS Transistors

DRAM Based on Hysteresis in Impact Ionization Single-Transistor-Latch

Characterization of Plasma-Induced Damage of Selectively Recessed GaN/InAlN/AlN/GaN Heterostructures Using SiCl4 and SF6

Fabrication and Characterization of Vertically Stacked Gate-All-Around Si Nanowire FET Arrays

Control of Ferromagnetism in a (Ga,Mn)As - Based Multiferroic System via a Ferroelectric Gate

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Oscillator Based on Suspended Gate MOS Transistors

Low-Noise Microwave Performance of 0.1 mu m Gate AlInN/GaN HEMTs on SiC

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Semiconductor device and method of manufacturing a semiconductor device

A model for robust electrostatic design of nanowire FETs with arbitrary polygonal cross sections

DRAM Based on Hysteresis in Impact Ionization Single-Transistor-Latch