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Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

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Nanometer CMOS characterization and compact modeling at deep-cryogenic temperatures

Edoardo Charbon, Harald Arjan Robert Homulle, Fabio Sebastiano

The characterization of nanometer CMOS transistors of different aspect ratios at deep-cryogenic temperatures (4 K and 100 mK) is presented for two standard CMOS technologies (40 nm and 160 nm). A detailed understanding of the device physics at those temper ...

2017

This paper presents a programmable analog current-mode circuit used to calculate the distance between two vectors of currents, following two distance measures. The Euclidean (L2) distance is commonly used. However, in many situations, it can be replaced wi ...

Institute of Electrical and Electronics Engineers2016

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This paper explores the potential and limitations of analog integrated circuit techniques for the simulation of low-loss or lossless 1D or 2D transmission mediums. In this approach, a transmission line is mapped into a ladder consisting of N identical LC e ...

Springer Verlag2016

Input-Series and Output-Series High Voltage Converter with Active Balancing Circuit for N-1 Operation

Alfred Rufer, Tiago Alexandre Nabais Lima

An input-series/output-series converter dedicated to high power applications is presented. The converter is composed of plural MF transformers based on DC-DC sub-converters. The series connection allows reaching input-voltage levels in the range of several ...

Ieee2016

Avalanche Microwave Noise Sources in Commercial 90-nm CMOS Technology

Christian Enz, Pierre-André Farine, Cyril Botteron, Gabriele Tasselli

This paper presents a microwave noise source implemented in a commercial CMOS technology. The circuit is based on the avalanche noise generated by both the source-to-bulk and the drain-to-bulk junctions in reverse breakdown. Two sources of different juncti ...

Institute of Electrical and Electronics Engineers2016

Circuits that are matched to balanced codes may recover transmitted information in a noise resilient and power efficient manner. Circuit components for processing a balanced code may include one or more of: matched amplification of the signals representing ...

2016

This communication extends a previously reported analytical circuit that models the plane wave scattering by 2-D arrays of planar patches/apertures embedded in a layered media. In this extension, it is assumed that the current/electric field spatial profil ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Signaling in 3-D integrated circuits, benefits and challenges

Somayyeh Rahimian Omam

Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...

EPFL2015

Graphene Negative Differential Resistance Circuit With Voltage-Tunable High Performance at Room Temperature

Mihai Adrian Ionescu, Arnaud Magrez, Antonios Bazigos, Laurent Syavoch Bernard, Pankaj Sharma

We propose, fabricate, and experimentally demonstrate a circuit based on graphene field-effect transistors (GFETs) showing enhanced negative differential resistance (NDR) characteristics at room temperature. The proposed graphene NDR (GNDR) circuit consist ...

Ieee-Inst Electrical Electronics Engineers Inc2015

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This article explores the effect of device parameter variations on the performance of subthreshold source-coupled logic (STSCL) circuits. A test chip has been fabricated in a standard CMOS 90 nm technology to study the matching properties of STSCL circuits ...

2015