Investigation on Output Capacitance Losses in Superjunction and GaN-on-Si Power Transistors

Low ON-resistance of advanced superjunction (SJ) and GaN-on-Si transistors is of great importance in power converters, however, the anomalous loss in their output capacitance (C OSS ) severely limits their performance. In this work, we use an energy-oriented measurement technique providing high voltage swings, high frequencies, and high values of dv/dt, which unlike Sawyer Tower, works without any pre-assumptions about circuit model of the transistor under test. This measurement method just relies on a low-voltage dc supply without the need of a high-power RF amplifier. In contrast with previous studies, the method shows that the small-signal E OSS of SJ devices is not necessarily different from the one measured at large-signal domain. However, the reported E OSS in datasheets might correspond to the discharging cycle, which is considerably lower than the actual E OSS needed to charge C OSS . Measurements on enhancement-mode GaN-on-Si power transistors give insights on the possible relation between C OSS -losses and dynamic RON degradation, as the two main phenomena hindering the performance of GaN transistors at high switching frequencies. These results give useful guidelines in utilizing and optimizing power transistors, especially at high-frequency operation.