Publication

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Related publications (87)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Graph Chatbot

Chat with Graph Search

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Active wire fences for multitenant FPGAs

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Assessment of the Bundle SNSPD Plus FPGA-Based TDC for High-Performance Time Measurements

Optimization Methods for Control: From Embedded Programmable Hardware to Data-Driven Process Optimization

FPGA Architecture: Principles and Progression

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

LUT-Based Optimization For ASIC Design Flow