A Compact Front-End Circuit for a Monolithic Sensor in a 65-nm CMOS Imaging Technology
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This article presents the design of a front-end circuit for monolithic active pixel sensors (MAPSs). The circuit operates with a sensor featuring a small, low-capacitance (
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The 65 nm process is an advanced lithographic node used in volume CMOS (MOSFET) semiconductor fabrication. Printed linewidths (i.e. transistor gate lengths) can reach as low as 25 nm on a nominally 65 nm process, while the pitch between two lines may be greater than 130 nm. For comparison, cellular ribosomes are about 20 nm end-to-end. A crystal of bulk silicon has a lattice constant of 0.543 nm, so such transistors are on the order of 100 atoms across. By September 2007, Intel, AMD, IBM, UMC and Chartered were also producing 65 nm chips.
An integrated circuit or monolithic integrated circuit (also referred to as an IC, a chip, or a microchip) is a set of electronic circuits on one small flat piece (or "chip") of semiconductor material, usually silicon. Large numbers of miniaturized transistors and other electronic components are integrated together on the chip. This results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete components, allowing a large transistor count.
Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", siːmɑːs, -ɒs) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS), and other digital logic circuits.
We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...
Monolithic pixel sensors integrate the sensor matrix and readout in the same silicon die, and therefore present several advantages over the more largely used hybrid detectors in high-energy physics. They offer an easier detector assembly, lower cost, lower ...
DC-DC converters based on Application Specific Integrated Circuits (ASICs) have been developed in this doctoral work for the High-Luminosity Large Hadron Collider (HL-LHC) experiments at CERN. They step down the voltage from a 2.5 V line and supply a load ...
