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This paper presents an output capacitor-less low-dropout regulator (LDO) with a bias switching scheme for biomedical applications with dual-range load currents. Power optimization is crucial for systems with multiple activation modes such as neural interfaces, IoT and edge devices with varying load currents. To enable rapid switching between low and high current states, a flipped voltage follower (FVF) configuration is utilized, along with a super source follower buffer to drive the power transistor. Two feedback loops and an on-chip compensation capacitor Cc maintain the stability of the regulator under various load conditions. The LDO was implemented in a 65nm CMOS process with 1.5V input and 1.2V output voltages. The measured quiescent current is as low as 3uA and 50uA for the 0-500uA and 5-15mA load current ranges, respectively. An undershoot voltage of 100mV is observed when the load current switches from 0 to 15mA within 80ns, with a maximum current efficiency of 99.98%. Our design achieved a low Figure-of-Merit of 0.21ps, outperforming state-of-the-art analog LDOs.
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