Exynosvignette|200px|Exynos 4210 sur la carte mère du Samsung Galaxy S II Exynos est le nom de plusieurs séries de SoC, basés sur l'architecture ARM de la marque sud-coréenne Samsung. La plus ancienne série à porter le nom officiel Exynos est le Hummingbird S5PC110 (Exynos 3110, un Cortex A8 contenant un GPU PowerVR SGX540) qui équipe les premières versions du smartphone Wave (tournant sous le système d'exploitation de Samsung Bada), puis du Galaxy S et de la tablette Galaxy Tab, tous deux utilisant le système d'exploitation Android de Google.
In-memory processingIn computer science, in-memory processing (PIM) is a computer architecture for processing data stored in an in-memory database. In-memory processing improves the power usage and performance of moving data between the processor and the main memory. Older systems have been based on disk storage and relational databases using Structured Query Language, which are increasingly regarded as inadequate to meet business intelligence (BI) needs.
Multiplieur-accumulateurEn programmation, à l'origine en traitement numérique du signal, l'opération combinée multiply–accumulate (MAC) ou multiply-add (MAD) est une instruction-machine qui calcule le produit de deux nombres et agrège le résultat au contenu d'un accumulateur. Le circuit électronique qui réalise cette opération est appelé « multiplieur-accumulateur » ; l'opération elle-même est souvent abrégée en MAC ou « opération MAC.
Classic RISC pipelineIn the history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. Those CPUs were: MIPS, SPARC, Motorola 88000, and later the notional CPU DLX invented for education. Each of these classic scalar RISC designs fetches and tries to execute one instruction per cycle. The main common concept of each design is a five-stage execution instruction pipeline.
Electronic system-level design and verificationElectronic system level (ESL) design and verification is an electronic design methodology, focused on higher abstraction level concerns. The term Electronic System Level or ESL Design was first defined by Gartner Dataquest, an EDA-industry-analysis firm, on February 1, 2001. It is defined in ESL Design and Verification as: "the utilization of appropriate abstractions in order to increase comprehension about a system, and to enhance the probability of a successful implementation of functionality in a cost-effective manner.
CaviumCavium was a fabless semiconductor company based in San Jose, California, specializing in ARM-based and MIPS-based network, video and security processors and SoCs. The company was co-founded in 2000 by Syed B. Ali and M. Raghib Hussain, who were introduced to each other by a Silicon Valley entrepreneur. Cavium offers processor- and board-level products targeting routers, switches, appliances, storage and servers. The company went public in May 2007 with about 175 employees.
AccelleraAccellera Systems Initiative (Accellera) is a standards organization that supports a mix of user and vendor standards and open interfaces development in the area of electronic design automation (EDA) and integrated circuit (IC) design and manufacturing. It is less constrained than the Institute of Electrical and Electronics Engineers (IEEE) and is therefore the starting place for many standards. Once mature and adopted by the broader community, the standards are usually transferred to the IEEE.
Flow to HDLFlow to HDL tools and methods convert flow-based system design into a hardware description language (HDL) such as VHDL or Verilog. Typically this is a method of creating designs for field-programmable gate array, application-specific integrated circuit prototyping and digital signal processing (DSP) design. Flow-based system design is well-suited to field-programmable gate array design as it is easier to specify the innate parallelism of the architecture. The use of flow-based design tools in engineering is a reasonably new trend.
