Publications associées à Threshold voltage

High-Performance ZnO Nanowire Transistors with Aluminum Top-Gate Electrodes and Naturally Formed Hybrid Self-Assembled Monolayer/AlOx Gate Dielectric

Klaus Kern, Hagen Klauk, Frederik Sebastian Ante

A method for the formation of a low-temperature hybrid gate dielectric for high-performance, top-gate ZnO nanowire transistors is reported. The hybrid gate dielectric consists of a self-assembled monolayer (SAM) and an aluminum oxide layer. The thin alumin ...

Amer Chemical Soc2014

Investigation of the dominant 1/f noise source in silicon nanowire sensors

Sara Rigante, Jan Brunner, Christian David

We analyzed 1/f noise in silicon nanowire ion-sensitive field-effect transistors (SiNW-ISFETs) having different wire widths ranging from 100 nm to 1 pin and operated under different gating conditions in order to determine the noise source and the sensor ac ...

Elsevier2014

Electron and Hole Mobilities in Single-Layer WSe2

Andras Kis, Adrien Victor Allain

Single-layer transition metal dichalcogenide WSe2 has recently attracted a lot of attention because it is a 2D semiconductor with a direct band gap. Due to low doping levels, it is intrinsic and shows ambipolar transport. This opens up the possibility to r ...

Amer Chemical Soc2014

A 5.43-μW 0.8-V Subthreshold Current-Sensing Σ∆ Modulator for Low-Noise Sensor Interfaces

Alexandre Schmid, Seyed Armin Tajalli, Yusuf Leblebici, Nikola Katic

A micro-watt power subthreshold current modulator suitable for low-power and low-noise sensor interfaces is presented. The prototype design is based on Subthreshold Source Coupled Logic (STSCL) cells and implemented in a 0.18 μm standard CMOS technology. T ...

2014

Electrical characterization of high performance, liquid gated vertically stacked SiNW-based 3D FET biosensors

Mihai Adrian Ionescu, Montserrat Fernandez-Bolanos Badia, Hoël Maxime Guérin, Elizabeth Buitrago Godinez

A 3D vertically stacked silicon nanowire (SiNW) field effect transistor featuring a high density array of fully depleted channels gated by a backgate and one or two symmetrical platinum side-gates through a liquid has been electrically characterized for th ...

Elsevier Science Sa2014

A Circuit Synthesis Flow for Controllable-Polarity Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Double-Gate (DG) controllable-polarity Field-Effect Transistors (FETs) are devices whose n- or p- polarity is on-line configurable by adjusting the second gate voltage. Such emerging transistors have been fabricated in silicon nanowires, carbon nanotuges a ...

Institute of Electrical and Electronics Engineers2014

Ideal saturated MHD helical structures in axisymmetric hybrid plasmas

Jonathan Graves, Wilfred Anthony Cooper, Daniele Brunetti

Kinked saturated m = 1 helical structures are frequently observed in tokamak hybrid plasmas and in reversed field pinches (RFP). These modes occur when an extremum in the safety factor is close to, but necessarily resonant with, a low order rational (typic ...

International Atomic Energy Agency2014

4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Pascal Andreas Meinerzhagen

Gain-Cell embedded DRAM (GC-eDRAM) has recently been recognized as a possible alternative to traditional SRAM. While GC-eDRAM inherently provides high-density, low-leakage, low-voltage, and 2-ported operation, its limited retention time requires periodic, ...

IEEE2014

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Threshold voltage

High-Performance ZnO Nanowire Transistors with Aluminum Top-Gate Electrodes and Naturally Formed Hybrid Self-Assembled Monolayer/AlOx Gate Dielectric

Investigation of the dominant 1/f noise source in silicon nanowire sensors

Tri-gate silicon nanowire transistors for ultra-low pH resolution and improved scalability

Electron and Hole Mobilities in Single-Layer WSe2

A 5.43-μW 0.8-V Subthreshold Current-Sensing Σ∆ Modulator for Low-Noise Sensor Interfaces

Electrical characterization of high performance, liquid gated vertically stacked SiNW-based 3D FET biosensors

A Circuit Synthesis Flow for Controllable-Polarity Transistors

Ideal saturated MHD helical structures in axisymmetric hybrid plasmas

Characterization of 6.5 kV IGBTs for High-Power Medium-Frequency Soft-Switched Applications

4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes

Graph Chatbot

Chattez avec Graph Search

Electron and Hole Mobilities in Single-Layer WSe2

High-Performance ZnO Nanowire Transistors with Aluminum Top-Gate Electrodes and Naturally Formed Hybrid Self-Assembled Monolayer/AlOx Gate Dielectric

Ideal saturated MHD helical structures in axisymmetric hybrid plasmas

4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes

Investigation of the dominant 1/f noise source in silicon nanowire sensors

A 5.43-μW 0.8-V Subthreshold Current-Sensing Σ∆ Modulator for Low-Noise Sensor Interfaces

Tri-gate silicon nanowire transistors for ultra-low pH resolution and improved scalability

Characterization of 6.5 kV IGBTs for High-Power Medium-Frequency Soft-Switched Applications

Electrical characterization of high performance, liquid gated vertically stacked SiNW-based 3D FET biosensors

A Circuit Synthesis Flow for Controllable-Polarity Transistors