Publications associées à Processeur 64 bits

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

Alexandre Schmid, Keyvan Farhang Razi

A programmable patient-customized epileptic seizure detector is proposed in this paper to enable neurologists and patients to have constructive interactions with the implantable medical device. The programmability feature is enabled by designing a low-powe ...

IEEE2023

System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms

David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Rafael Medina Morillas, Joshua Alexander Harrison Klein

Multi-Chiplet architectures are being increasingly adopted to support the design of very large systems in a single package, facilitating the integration of heterogeneous components and improving manufacturing yield. However, chiplet-based solutions have to ...

2023

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workload ...

2022

List Ordered Statistics Decoders for Polar Codes

Andreas Peter Burg, Yifei Shen, Chuan Zhang

The de-facto standard decoding algorithm for polar codes, successive cancellation list (SCL) decoding, is a breadth-first search algorithm. By keeping a list of candidate codewords, SCL decoding improves the performance as the list size L increases. Howeve ...

IEEE2022

Lock-in amplified differential phase contrast

Christophe Moser, Timothé Laforest, Damien Claude-Marie Loterie, Chiara Bonati

We introduce a lock-in method to increase the phase contrast in incoherent Differential Phase Contrast (DPC) imaging. The use of a smart pixel detector with in-pixel signal demodulation, paired with synchronized illumination, provides the basis of a bit-ef ...

SPIE-INT SOC OPTICAL ENGINEERING2022

Lock-in incoherent differential phase contrast imaging

Christophe Moser, Timothé Laforest, Damien Claude-Marie Loterie, Chiara Bonati

We introduce a lock-in method to increase the phase contrast in incoherent differential phase contrast (DPC) imaging. This method improves the phase sensitivity by the analog removal of the background. The use of a smart pixel detector with in-pixel signal ...

CHINESE LASER PRESS2022

Horizontal side-channel full key recovery on ephemeral SIKE

Natacha Yolande Emmanuel Marie Linard de Guertechin, Aymeric Genet, Novak Kaluderovic

This paper describes the first practical single-trace side-channel power analysis of SIKE. The attack exploits the nature of elliptic curve point addition formulas which require the same function to be executed multiple times. We target the three point lad ...

2021

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Processeur 64 bits

EdgeAI-Aware Design of In-Memory Computing Architectures

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms

Hardware Implementation of Digital Signal Processing Algorithms for Programmable Epilepsy Control Systems

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

List Ordered Statistics Decoders for Polar Codes

Lock-in amplified differential phase contrast

Lock-in incoherent differential phase contrast imaging

Horizontal side-channel full key recovery on ephemeral SIKE

Graph Chatbot

Chattez avec Graph Search

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

EdgeAI-Aware Design of In-Memory Computing Architectures

List Ordered Statistics Decoders for Polar Codes

Lock-in amplified differential phase contrast

Horizontal side-channel full key recovery on ephemeral SIKE

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

Hardware Implementation of Digital Signal Processing Algorithms for Programmable Epilepsy Control Systems

Lock-in incoherent differential phase contrast imaging