Publications associées à Bus ISA (Informatique)

TiC-SAT: Tightly-coupled Systolic Accelerator for Transformers

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi, Joshua Alexander Harrison Klein

Transformer models have achieved impressive results in various AI scenarios, ranging from vision to natural language processing. However, their computational complexity and their vast number of parameters hinder their implementations on resource-constraine ...

2023

Alternation makes the adversary weaker in two-player games

Volkan Cevher, Efstratios Panteleimon Skoulakis, Luca Viano, Ali Kavis

Motivated by alternating game-play in two-player games, we study an altenating variant of the Online Linear Optimization (OLO). In alternating OLO, a learner at each round t ∈[n] selects a vector xt and then an adversary selects a cost-vector ct ∈[−1,1]n. ...

2023

ANTIGONE: A Programmable Energy-Efficient Current Digitizer for an ISFET Wearable Sweat Sensing System

Maher Kayal, Evgenia Voulgari, François Krummenacher

This article describes the design and the characterization of the ANTIGONE (ANalog To dIGital cONvErter) ASIC (Application Specific Integrated Circuit) built in AMS 0.35 m technology for low dc-current sensing. This energy-efficient ASIC was specifically d ...

2021

A 30-frames/s, 252 x 144 SPAD Flash LiDAR With 1728 Dual-Clock 48.8-ps TDCs, and Pixel-Wise Integrated Histogramming

Edoardo Charbon, Ivan Michel Antolovic, Scott Anthony Lindner, Chunmin Zhang, Juan Mata Pavia, Martin Wolf

A 252 x 144 single-photon avalanche diode (SPAD) pixel sensor, called Ocelot, is reported for light detection and ranging (LiDAR). The sensor, fabricated in the 180-nm CMOS technology, features 1728 12-bit time-to-digital converters (TDCs) with 48.8-ps res ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

A Fully-Integrated IC with 0.85-uW/Channel Consumption for Epileptic iEEG Detection

Alexandre Schmid, Mahsa Shoaran

Feature extraction from a multichannel compressed neural signal is introduced in this brief. Compressive sensing (CS) is an efficient method for reducing the transmission data rate of sparse biological signals and lowering the power consumption of resource ...

Ieee-Inst Electrical Electronics Engineers Inc2015

Hardware synthesis of complex standard interfaces using CAL dataflow descriptions

Marco Mattavelli, Romuald Mosqueron, Richard Thavot, Julien Dubois

This paper presents a contribution to the development of rapid prototyping tools based on data-flow description. In this context, the efficiency of automatic translator tools from the data-flow description to C and/or HDL are presented using two design cas ...

2009

Towards a Unified Top-Down Design Flow for Fully-Differential Logic Blocks with Improved Speed and Noise Immunity

Yusuf Leblebici, Stéphane Badel, Ilhan Hatirnaz

A new top-down design flow (RTL-to-GDSII) is proposed for achieving high-performance and noiseimmune designs consisting of differential logic blocks. The differential building blocks are based on the currentmode logic (CML), which offers true differentiali ...

2005