Publications associées à Architecture de mémoire à multiples canaux

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

2024

Miniaturised, Wireless and Distributed Neural Interface Toward Cortical Visual Prosthesis

Gian Luca Barbruni

Over the last decades, implantable neural interfaces have been extensively explored and effectively deployed to address neurological and mental health disorders. The existing solutions present several limitations. Firstly, the physical size of the implanta ...

EPFL2023

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

Edoardo Charbon, Claudio Bruschini, Andrei Ardelean, Paul Mos, Arin Can Ülkü, Michael Alan Wayne

In this article, we report on SwissSPAD3 (SS3), a 500 x 500 pixel single-photon avalanche diode (SPAD) array, fabricated in 0.18-mu m CMOS technology. In this sensor, we introduce a novel dual-gate architecture with two contiguous temporal windows, or gate ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Sampling-Based AQP in Modern Analytical Engines

Anastasia Ailamaki, Viktor Sanca

As the data volume grows, reducing the query execution times remains an elusive goal. While approximate query processing (AQP) techniques present a principled method to trade off accuracy for faster queries in analytics, the sample creation is often consid ...

ACM2022

Gyrokinetic simulations on many- and multi-core architectures with the global electromagnetic Particle-In-Cell Code ORB5

Laurent Villard, Stephan Brunner, Emmanuel Lanti, Noé Thomas Elie Ohana, Claudio Gheller

Gyrokinetic codes in plasma physics need outstanding computational resources to solve increasingly complex problems, requiring the effective exploitation of cutting-edge HPC architectures. This paper focuses on the enabling of ORB5, a state-of-the-art, fir ...

2021

Real-Time Personalized Atrial Fibrillation Prediction on Multi-Core Wearable Sensors

David Atienza Alonso, Amir Aminifar, Miguel Peon Quiros, Adriana Arza Valdes, Elisabetta De Giovanni

In the recent Internet-of-Things (IoT) era where biomedical applications require continuous monitoring of relevant data, edge computing keeps gaining more and more importance. These new architectures for edge computing include multi-core and parallel compu ...

2021

Resource Management for Power-Constrained HEVC Transcoding Using Reinforcement Learning

David Atienza Alonso, Marina Zapater Sancho, Arman Iranfar, Luis Maria Costero Valero

The advent of online video streaming services along with the users' demand for high-quality contents require High Efficiency Video Coding (HEVC), which provides higher quality and compression at the cost of increased complexity. On one hand, HEVC exposes a ...

2020

A 30-frames/s, 252 x 144 SPAD Flash LiDAR With 1728 Dual-Clock 48.8-ps TDCs, and Pixel-Wise Integrated Histogramming

Edoardo Charbon, Ivan Michel Antolovic, Scott Anthony Lindner, Chunmin Zhang, Juan Mata Pavia, Martin Wolf

A 252 x 144 single-photon avalanche diode (SPAD) pixel sensor, called Ocelot, is reported for light detection and ranging (LiDAR). The sensor, fabricated in the 180-nm CMOS technology, features 1728 12-bit time-to-digital converters (TDCs) with 48.8-ps res ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Hardware-conscious Hash-Joins on GPUs

Anastasia Ailamaki, Manolis Karpathiotakis, Raja Appuswamy, Periklis Chrysogelos, Panagiotis Sioulas

Traditionally, analytical database engines have used task parallelism provided by modern multisocket multicore CPUs for scaling query execution. Over the past few years, GPUs have started gaining traction as accelerators for processing analytical queries d ...

IEEE2019

Milkomeda: Safeguarding the Mobile GPU Interface Using WebGL Security Checks

Mathias Josef Payer

GPU-accelerated graphics is commonly used in mobile applications. Unfortunately, the graphics interface exposes a large amount of potentially vulnerable kernel code (i.e., the GPU device driver) to untrusted applications. This broad attack surface has resu ...

ASSOC COMPUTING MACHINERY2018