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Concepts associés (31)
Stream processing
In computer science, stream processing (also known as event stream processing, data stream processing, or distributed stream processing) is a programming paradigm which views streams, or sequences of events in time, as the central input and output objects of computation. Stream processing encompasses dataflow programming, reactive programming, and distributed data processing. Stream processing systems aim to expose parallel processing for data streams and rely on streaming algorithms for efficient implementation.
Multiprocessor system on a chip
A multiprocessor system on a chip ( (), ˌɛmˌpiː'sɒk or ˌɛmˌpiːˌɛsˌoʊˈsiː ) is a system on a chip (SoC) which includes multiple microprocessors. As such, it is a multi-core system on a chip. MPSoCs are usually targeted for embedded applications. It is used by platforms that contain multiple, usually heterogeneous, processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy and I/O components.
Data processing unit
A data processing unit (DPU) is a programmable computer processor that tightly integrates a general-purpose CPU with network interface hardware. Sometimes they are called "IPUs" (for "infrastructure processing unit") or "SmartNICs". They can be used in place of traditional NICs to relieve the main CPU of complex networking responsibilities and other "infrastructural" duties; although their features vary, they may be used to perform encryption/decryption, serve as a firewall, handle TCP/IP, process HTTP requests, or even function as a hypervisor or storage controller.
Traitement massivement parallèle
En informatique, le traitement massivement parallèle (en anglais, massively parallel processing ou massively parallel computing) est l'utilisation d'un grand nombre de processeurs (ou d'ordinateurs distincts) pour effectuer un ensemble de calculs coordonnés en parallèle (c'est-à-dire simultanément). Différentes approches ont été utilisées pour implanter le traitement massivement parallèle. Dans cette approche, la puissance de calcul d'un grand nombre d'ordinateurs distribués est utilisée de façon opportuniste chaque fois qu'un ordinateur est disponible.
C to HDL
C to HDL tools convert C language or C-like computer code into a hardware description language (HDL) such as VHDL or Verilog. The converted code can then be synthesized and translated into a hardware device such as a field-programmable gate array. Compared to software, equivalent designs in hardware consume less power (yielding higher performance per watt) and execute faster with lower latency, more parallelism and higher throughput.
Flow to HDL
Flow to HDL tools and methods convert flow-based system design into a hardware description language (HDL) such as VHDL or Verilog. Typically this is a method of creating designs for field-programmable gate array, application-specific integrated circuit prototyping and digital signal processing (DSP) design. Flow-based system design is well-suited to field-programmable gate array design as it is easier to specify the innate parallelism of the architecture. The use of flow-based design tools in engineering is a reasonably new trend.
Réseau de processeurs massivement parallèles
A massively parallel processor array, also known as a multi purpose processor array (MPPA) is a type of integrated circuit which has a massively parallel array of hundreds or thousands of CPUs and RAM memories. These processors pass work to one another through a reconfigurable interconnect of channels. By harnessing a large number of processors working in parallel, an MPPA chip can accomplish more demanding tasks than conventional chips. MPPAs are based on a software parallel programming model for developing high-performance embedded system applications.
Tensor Processing Unit
vignette|Un Tensor Processing Unit 3.0 datant de mai 2016 Un Tensor Processing Unit (TPU, unité de traitement de tenseur) est un circuit intégré spécifique pour une application (ASIC), développé par Google spécifiquement pour accélérer les systèmes d'intelligence artificielle par réseaux de neurones. Les TPU ont été annoncés en 2016 au Google I/O, lorsque la société a déclaré les utiliser dans leurs centres de données depuis plus d'un an.
Calcul hétérogène
Heterogeneous computing refers to systems that use more than one kind of processor or core. These systems gain performance or energy efficiency not just by adding the same type of processors, but by adding dissimilar coprocessors, usually incorporating specialized processing capabilities to handle particular tasks. Usually heterogeneity in the context of computing referred to different instruction-set architectures (ISA), where the main processor has one and other processors have another - usually a very different - architecture (maybe more than one), not just a different microarchitecture (floating point number processing is a special case of this - not usually referred to as heterogeneous).
Performance par watt
En informatique, la performance par watt est une mesure de l'efficacité énergétique d'un ordinateur. Celle-ci mesure la puissance de calcul délivrée par un ordinateur pour chaque watt consommé. Le terme de performance n'est pas objectif, puisqu'il dépend du type de charge de travail demandé. Cependant, la liste Green 500 classant les supercalculateurs les plus efficaces utilise un seul test de performance. Les architectes systèmes utilisant des systèmes parallèles utilisent des notions de performance par watt pour choisir leurs processeurs, le coût d'alimentation du CPU dépassant son prix d'achat.