CPU core voltage

The CPU core voltage (VCORE) is the power supply voltage supplied to the CPU (which is a digital circuit), GPU, or other device containing a processing core. The amount of power a CPU uses, and thus the amount of heat it dissipates, is the product of this voltage and the current it draws. In modern CPUs, which are CMOS circuits, the current is almost proportional to the clock speed, the CPU drawing almost no current between clock cycles. (See, however, subthreshold leakage.) Power saving and clock speed To conserve power and manage heat, many laptop and desktop processors have a power management feature that software (usually the operating system) can use to adjust the clock speed and core voltage dynamically. Often a voltage regulator module converts from 5V or 12 V or some other voltage to whatever CPU core voltage is required by the CPU. The trend is towards lower core voltages, which conserve power. This presents the CMOS designer with a challenge, because in CMOS

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CS-307: Introduction to multiprocessor architecture

Multiprocessors are a core component in all types of computing infrastructure, from phones to datacenters. This course will build on the prerequisites of processor design and concurrency to introduce the essential technologies required to combine multiple processing elements into a single computer.

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A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer

Philip Brisk, Frédéric Gessler, Mirjana Stojilovic

RePlAce is a state-of-the-art prototype of a flat, analytic, and nonlinear global cell placement algorithm, which models a placement instance as an electrostatic system with positively charged objects. It can handle large-scale standard-cell and mixed-cell placement, while achieving shorter wirelength and similar or shorter runtimes than other state-of-the-art placers on the ISPD-2005/2006 standard-cell benchmarks; however, the runtime of RePlAce on these benchmarks ranges from 15 minutes to 5+ hours on a 2.6 GHz Intel Xeon server running a single thread, rendering development cycles prohibitively long. To address this concern, this paper introduces a multi-threaded shared-memory implementation of RePlAce. The contributions include techniques to reduce memory contention and to effectively balance the workload among threads, targeting the most substantial performance bottlenecks. With 2–12 threads, our parallel RePlAce speeds up the bin density function by a factor of 4.2–10×, the wirelength function by a factor of 2.3–3×, and the cost gradient function by a factor of 2.9–6.6× compared to the single-threaded original RePlAce baseline. Moreover, our parallel RePlAce is ≈3.5× faster than the state-of-the-art PyTorch-based placer DREAMPlace, when both are running on 12 CPU cores.

IEEE2020

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Polarity-Controllable Silicon Nanowire Transistors with Dual Threshold Voltages

Michele De Marchi, Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Yusuf Leblebici, Davide Sacchetto, Jian Zhang

Gate-all-around (GAA) silicon nanowires enable an unprecedented electrostatic control on the semiconductor channel that can push device performance with continuous scaling. In modern electronic circuits, the control of the threshold voltage is essential for improving circuit performance and reducing static power consumption. Here, we propose a silicon Wnanowire transistor with three independent GAA electrodes, demonstrating, within a unique device, a dynamic configurability in terms of both polarity and threshold voltage (V-T). This silicon nanowire transistor is fabricated using a vertically stacked structure with a top-down approach. Unlike conventional threshold voltage modulation techniques, the threshold control of this device is achieved by adapting the control scheme of the potential barriers at the source and drain interfaces and in the channel. Compared to conventional dual-threshold techniques, the proposed device does not tradeoff the leakage reduction at the detriment of the ON-state current, but only through a later turn-ON coming from a higher V-T. This property offers leakage control at a reduction of loss in performance. The measured characteristic demonstrates a threshold voltage difference of similar to 0.5 V between low-V-T and high-V-T configurations, while high-V-T configuration reduces the leakage current by two orders of magnitude as compared to low-V-T configuration.

Institute of Electrical and Electronics Engineers2014

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