Publications associées à PowerPC

On performance scaling and speed of junctionless transistors

A prospective study of the junctionless transistors (JLTs) scaling performances based both on TCAD and analytical evaluations of the intrinsic delay after considering on/off voltage constraints is proposed. The tradeoffs between speed and switching power p ...

Pergamon-Elsevier Science Ltd2013

Thermal Characterization of Cloud Workloads on a Power-Efficient Server-on-Chip

Babak Falsafi, Pejman Lotfi Kamran, Andreas Panteli

We propose a power-efficient many-core server-on-chip system with 3D-stacked Wide I/O DRAM targeting cloud workloads in datacenters. The integration of 3D-stacked Wide I/O DRAM on top of a logic die increases available memory bandwidth by using dense and f ...

2012

Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology

Michail Zervas, Yusuf Leblebici, Alessandro Cevrero, Yüksel Temiz, Giulia Beanato, Panagiotis Athanasopoulos, Paolo Giovannini

An innovative modular 3-D stacked multi-processor architecture is presented. The platform is composed of completely identical stacked dies connected together by through-silicon-vias (TSVs). Each die features four 32-bit embedded processors and associated m ...

2012

Towards Cost Effective Multi-Core Processor Platforms Using 3-D Stacking Technology

Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato, Panagiotis Athanasopoulos

A novel modular, cost e ffective 3D multi-processor architecture is presented. Auto-configurable and independently testable identical dies are stacked exploiting Through-Silicon-Vias (TSV) technology, allowing to target different market segments by selecti ...

2012

A Framework to Model and Analyze the WHY and the HOW of Coopetition

Alain Wegmann, Arash Golnam, Ron Sanchez

Coopetition has been defined as an approach to managing that combines competition and cooperation. It transcends the traditional paradigms of competition and cooperation in an effort to achieve the advantages of both. As an inter-organizational relationshi ...

2011

A mixed-signal platform dedicated to power system dynamic computation

Maher Kayal, Cédric Meinen, Laurent Fabre, Ira Nagel

has already been proven that analog emulation overcomes the speed limits of numerical simulators by means of a simple fixed-topology prototype. In order to enhance the modularity and the size of the emulated power system a dedicated platform based on a fie ...

IEEE2011

Die-Level TSV Fabrication Platform for CMOS-MEMS Integration

Carlotta Guiducci, Michail Zervas, Yusuf Leblebici, Yüksel Temiz

This paper reports a new post-CMOS processing platform for die-level through-silicon-via (TSV) fabrication, based on wafer reconstitution from embedded dies, parylene deposition, stencil lithography, and bottom-up electroplating. The goal of this work is t ...

2011

Smart Power IC simulation of substrate coupled current due to majority and minority carriers transports

Maher Kayal, Jean-Michel Sallese, Fabrizio Lo Conte

This paper presents a new approach for substrate parasitic current simulation in smart power integrated circuit. A new compact modeling approach developed in previous work has been used to create an equivalent substrate schematic. The latter is composed of ...

2010

High-Speed Power System Stability Simulation Using Analog Computation

Maher Kayal, Laurent Fabre, Ira Nagel

This paper presents a microelectronic emulation approach for high-speed power system computation. First, the problems of existing power system simulators are detailed. This shows that microelectronic emulation is a possible solution for solving the speed p ...

2010

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PowerPC

On performance scaling and speed of junctionless transistors

A Lego Mindstorms NXT Experiment for Model Predictive Control Education

Thermal Characterization of Cloud Workloads on a Power-Efficient Server-on-Chip

Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology

Towards Cost Effective Multi-Core Processor Platforms Using 3-D Stacking Technology

A Framework to Model and Analyze the WHY and the HOW of Coopetition

A mixed-signal platform dedicated to power system dynamic computation

Die-Level TSV Fabrication Platform for CMOS-MEMS Integration

Smart Power IC simulation of substrate coupled current due to majority and minority carriers transports

High-Speed Power System Stability Simulation Using Analog Computation

Graph Chatbot

Chattez avec Graph Search

A Framework to Model and Analyze the WHY and the HOW of Coopetition

A mixed-signal platform dedicated to power system dynamic computation

On performance scaling and speed of junctionless transistors

Die-Level TSV Fabrication Platform for CMOS-MEMS Integration

Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology

Towards Cost Effective Multi-Core Processor Platforms Using 3-D Stacking Technology

Smart Power IC simulation of substrate coupled current due to majority and minority carriers transports

High-Speed Power System Stability Simulation Using Analog Computation

A Lego Mindstorms NXT Experiment for Model Predictive Control Education

Thermal Characterization of Cloud Workloads on a Power-Efficient Server-on-Chip