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Concept
Cycles per instruction
Résumé
In computer architecture, cycles per instruction (aka clock cycles per instruction, clocks per instruction, or CPI) is one aspect of a processor's performance: the average number of clock cycles per instruction for a program or program fragment. It is the multiplicative inverse of instructions per cycle.
The average of Cycles Per Instruction in a given process (CPI) is defined by the following weighted average:
Where is the number of instructions for a given instruction type , is the clock-cycles for that instruction type and is the total instruction count. The summation sums over all instruction types for a given benchmarking process.
Let us assume a classic RISC pipeline, with the following five stages:
Instruction fetch cycle (IF).
Instruction decode/Register fetch cycle (ID).
Execution/Effective address cycle (EX).
Memory access (MEM).
Write-back cycle (WB).
Each stage requires one clock cycle and an instruction passes through the stages sequentially. Without pipelining, in a multi-cycle processor, a new instruction is fetched in stage 1 only after the previous instruction finishes at stage 5, therefore the number of clock cycles it takes to execute an instruction is five (CPI = 5 > 1). In this case, the processor is said to be subscalar. With pipelining, a new instruction is fetched every clock cycle by exploiting instruction-level parallelism, therefore, since one could theoretically have five instructions in the five pipeline stages at once (one instruction per stage), a different instruction would complete stage 5 in every clock cycle and on average the number of clock cycles it takes to execute an instruction is 1 (CPI = 1). In this case, the processor is said to be scalar.
With a single-execution-unit processor, the best CPI attainable is 1. However, with a multiple-execution-unit processor, one may achieve even better CPI values (CPI < 1). In this case, the processor is said to be superscalar. To get better CPI values without pipelining, the number of execution units must be greater than the number of stages.
Source officielle
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