Concept

Pile (informatique)

Publications associées (68)

Solid oxide fuel cell anode degradation by the effect of siloxanes

Jan Van Herle, Stefan Diethelm, Hossein Madi, Davide Papurello

Lifetime and durability issues connected with Solid Oxide Fuel Cell (SOFC) technology are strongly related to the amount of contaminants that reach the stack. In this study the focus is on organic silicon compounds (siloxanes) and their highly detrimental ...

2015

Putting the Pieces Together: The Construction of a Reliable Virtualizing Object-Based Storage Stack

Raja Appuswamy

The operating system storage stack is an important software component, but it faces several reliability threats. The research community has come up with many solutions to address individual parts of this reliability problem. However, when considering the b ...

IEEE2014

Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache

Giovanni De Micheli, Siang-Yun Lee

The advent of 3-D fabrication technology makes it possible to stack a large amount of last-level cache memory onto a multi-core die to reduce off-chip memory accesses and, thus, increases system performance. However, the higher power density (i.e., power d ...

2014

3D Geometry Representation using Multiview Coding of Image Tiles

Pascal Frossard, Thomas Maugey, Yu Gao

Compression of dynamic 3D geometry obtained from depth sensors is challenging, because noise and temporal inconsistency inherent in acquisition of depth data means there is no one-to-one correspondence between sets of 3D points in consecutive time instants ...

2014

Modelling the impact of creep on the probability of failure of a solid oxide fuel cell stack

Jan Van Herle, Arata Nakajo, Fabio Greco

In solid oxide fuel cell (SOFC) technology a major challenge lies in balancing thermal stresses from an inevitable thermal field. The cells are known to creep, changing over time the stress field. The main objective of this study was to assess the influenc ...

2014

Runtime 3-D Stacked Cache Management for Chip-Multiprocessors

Giovanni De Micheli

These-dimensional (3-D) memory stacking is one of the most promising solutions to memory bandwidth problems in chip multiprocessors. In this work, we propose an efficient runtime 3-D cache management technique which takes advantage of the lower latencies t ...

2013

Lightweight Snapshots and System-level Backtracking

George Candea, Edouard Bugnion, Vitaly Chipounov

We propose a new system-level abstraction, the lightweight immutable execution snapshot, which combines the immutable characteristics of checkpoints with the direct integration into the virtual memory subsystem of standard mutable address spaces. The abstr ...

USENIX2013

The S2E Platform: Design, Implementation, and Applications

George Candea, Vitaly Chipounov, Volodymyr Kuznetsov

This article presents S2E, a platform for analyzing the properties and behavior of software systems, along with its use in developing tools for comprehensive performance profiling, reverse engineering of proprietary software, and automated testing of kerne ...

2012

A High-throughput and Low-Latency Interconnection Network for Multi-Core Clusters with 3-D Stacked L2 Tightly-Coupled Data Memory

Giovanni De Micheli, Luca Benini

The performance of most digital systems today is limited by the interconnect latency between logic and memory, rather than by the performance of logic or memory itself. Three- dimensional (3-D) integration using through-silicon-vias (TSVs) may provide a so ...

2012

Multipolar effects and strong coupling in hybrid plasmonic metamaterials

Olivier Martin, Arash Farhang

Recently stacked metamaterial structures coupled to a conductive plane have been investigated and have been shown to exhibit the same properties as stacked structures with double the layers, due to dipole mirror coupling. Here we study a system of stacked ...

Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa2012

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