Publications associées à Interrupteur

Systematically testing OpenFlow controller applications

Dejan Kostic, Marco Canini, Peter Peresini, Maciej Leszek Kuzniar, Jennifer Rexford

The emergence of OpenFlow-capable switches enables exciting new network functionality, at the risk of programming errors that make communication less reliable. The centralized programming model, where a single controller program manages the network, seems ...

Elsevier Science Bv2015

Fabrication process and characterization of suspended graphene membranes for RF NEMS capacitive switches

Mihai Adrian Ionescu, Clara-Fausta Moldovan, Wolfgang Amadeus Vitale, Laurent Syavoch Bernard, Pankaj Sharma

The fabrication of a Nanoelectromechanical System (NEMS) capacitive switch consisting of a suspended multilayer graphene membrane, doubly clamped on a coplanar waveguide (CPW) is presented and its RF performance is evaluated. The scattering parameters are ...

Elsevier2015

Modeling Parasitic Vertical PNP in HVCMOS

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

High voltage CMOS active devices inherently have a parasitic vertical bipolar transistor. The parasitic PNP structure can be activated during high-power switching operation causing a potential shift of the substrate. In this work a spice-modeling approach ...

IEEE2015

A Study on Buffer Distribution for RRAM-based FPGA Routing Structures

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Somayyeh Rahimian Omam

Compared to Application-Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) provide reconfigurablity at the cost of lower performance and higher power consumption. Exploiting a large number of programmable switche ...

IEEE2015

What You Need to Know About SDN Flow Tables

Dejan Kostic, Peter Peresini, Maciej Leszek Kuzniar

SDN deployments rely on switches that come from various vendors and differ in terms of performance and available features. Understanding these differences and performance characteristics is essential for ensuring successful deployments. In this paper we me ...

Springer-Verlag Berlin2015

Hardware-in-the-Loop Validation of an FPGA-Based Real-Time Simulator for Power Electronics Applications

Mario Paolone, Reza Razzaghi

This paper presents the hardware-in-the-loop (HIL) validation of a proposed FPGA-based real-time simulator for power electronics applications. The proposed FPGA-based real-time simulation platform integrates the Modified Nodal Analysis (MNA) method, Fixed ...

ipst.org2015

Method to optimize the communication parameters between an access point and at least one client device

Patrick Thiran, Julien Pierre Sacha Herzen, Ruben Merz

A method to optimize the communication on a channel between an access point and at least one client device, said channel being characterized by a center frequency and a bandwidth, comprises: establishing a connection on a first channel according to a first ...

2014

Electromagnetic Performance of RF NEMS Graphene Capacitive Switches

Mihai Adrian Ionescu, Clara-Fausta Moldovan, Julien Perruisseau-Carrier, Pankaj Sharma

The RF performance of a nanoelectromechanical systems (NEMS) capacitive switch based on graphene is evaluated. Our results show that graphene can be a good candidate for the membrane of RF NEMS switches in applications where low actuation voltage and fast ...

Institute of Electrical and Electronics Engineers2014

Real-time sawtooth control and NTM preemption in ITER

Olivier Sauter, Timothy Goodman, Doohyun Kim, Donghyun Kim

Real-time control of multiple plasma actuators is a requirement in advanced tokamaks; for example, for burn control, plasma current profile control and MHD stabilizationelectron cyclotron (EC) wave absorption is ideally suited especially for the latter. O ...

Amer Inst Physics2014

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Interrupteur

Systematically testing OpenFlow controller applications

Large-scale silicon photonic switches with movable directional couplers

Fabrication process and characterization of suspended graphene membranes for RF NEMS capacitive switches

Modeling Parasitic Vertical PNP in HVCMOS

A Study on Buffer Distribution for RRAM-based FPGA Routing Structures

What You Need to Know About SDN Flow Tables

Hardware-in-the-Loop Validation of an FPGA-Based Real-Time Simulator for Power Electronics Applications

Method to optimize the communication parameters between an access point and at least one client device

Electromagnetic Performance of RF NEMS Graphene Capacitive Switches

Real-time sawtooth control and NTM preemption in ITER

Graph Chatbot

Chattez avec Graph Search

Fabrication process and characterization of suspended graphene membranes for RF NEMS capacitive switches

Electromagnetic Performance of RF NEMS Graphene Capacitive Switches

Systematically testing OpenFlow controller applications

Large-scale silicon photonic switches with movable directional couplers

What You Need to Know About SDN Flow Tables

Modeling Parasitic Vertical PNP in HVCMOS

A Study on Buffer Distribution for RRAM-based FPGA Routing Structures

Real-time sawtooth control and NTM preemption in ITER

Method to optimize the communication parameters between an access point and at least one client device

Hardware-in-the-Loop Validation of an FPGA-Based Real-Time Simulator for Power Electronics Applications